On 01:36 PM 14/05/2001 -0500, Ted Tontis said:
>Hello,
> Is there a way to tent vias in Protel on one layer only? I would
>like to tent the vias on the top side of the PCB and leave the bottom one's
>open for ICT. I know there is some question weather this is good design
>practice or not, as it could trap contaminates inside the via. Has anyone
>tried this and experienced poor results, or success?
>
>Thank you,
>
>Ted
>Ted Tontis
>Engage Networks Inc.
>[EMAIL PROTECTED]
>PH 414.273.7600 Ext. 7607 <http://www.engagenet.com>
No there is no automated or rule based method of doing this.
You could create gerbers as a two pass operation changing the via mask
expansion rule in between creating the top and bottom mask layers.
I suggested a long time ago that it might be useful to be able to execute a
macro/process/server whatever in between steps of the CAM Manager. So CAM
Manager would allow the order of its different steps to be varied. Either
that or allow CAM Manager steps to carry and impose temporary sets of
manufacturing rules. This would allow all sorts of complex manipulations of
the gerbers in a controlled documentable fashion. So a sort of a script
based CAM Manager.
Suggestion (repeated): allow the various mask layer expansion rules to be
restricted to a particular layer. At the moment a multi-layer pad only
exists on the multi-layer. Making a mask expansion rule with scope
Object=Via And Layer=Top does not affect multi-layer vias (can there be any
other sort?). I could find no way to allow different mask expansions for
multi-layer pads or vias.
What I often do, once I know what my testpoints are, is tent both sides but
overlay on suitable vias a similar sized testpoint pad. This opens the
mask on the test layer. Since we put testpoint components on our
schematics, the process is quite simple as all the testpoint pads are
loaded during sychronisation. The only annoying thing is that Protel does
not allow global manipulation of the testpoint state of pads so you need an
external server to go through and make all the testpoint component pads
marked as testpoints. I wrote a server to help with this.
As for contaminants, maybe, but it has never been an issue for us. We are
rarely doing boards with lifetimes beyond 5 years. Also we are not using
tiny via hole sizes (about 0.5mm is our smallest).
Ian Wilson
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