At 09:52 AM 6/11/01 -0400, [EMAIL PROTECTED] wrote:
>We are trynig to clean up our design process by, among other things, going to
>a convention where net names are local to a sheet and module ports are
>global. But I'm having trouble understanding how the attributes of a port
>interact, and how they are meant to be used to ensure a well-documented,
>ERC-able design.
It's not surprising. It can be confusing. For reference, here is how the
three scopes work:
Netlabels & Ports Global. Any net label or port on any sheet will
unconditionally connect to the same net label or port on any other sheet.
Net labels will connect to ports of the same name on any sheet.
Ports Only Global. All intersheet connections are accomplished by Ports (or
power objects); Net labels produce local nets (local to the sheet), they do
not connect to the same-named net on other sheets unless there is a port in
the net on both sheets. Local nets are given an extension in the net name,
to keep them unique. (Because the extension is the page number, now we know
why Protel ERC cares that page numbers are duplicated: I haven't checked
it, but this could mess with the local net names. If it does cause
duplication, one might use this fact to allow single "pages" that were more
than one sheet, by giving them the same page number. Not that I am
recommending this if one has a choice....)
With the first two scopes, Sheet Entries are ignored. (Sheet Entries are
the representation of Ports on a Sheet Symbol.
Sheet Symbol / Port Connections. This is used with hierarchical schematics.
It is like Ports Only Global, except that Ports do not connect to Ports on
other sheets with the same name; connections must be explicitly made
between Sheet Entries, either by wiring them together or by connecting them
to net labels.
In all three modes, power ports create global nets, that is, if you put a
VCC power port on one sheet, it will unconditionally connect to VCC on any
other sheet. Power ports are intended for use for power only. However, they
do not have a type associated with them, so theoretically one could use
them to create global non-power nets with a sheet symbol/port connections
scope. If I were going to do that, I would probably use the arrow type
power port as a distinguishing mark.
Note also that hidden pins create global nets as well.
Both Netlabels & Ports Global and Ports Only Global can be used for
multi-sheet flat schematics, which become just like one big sheet. Ports
Only Global are also useful for flat schematics but make design re-use
easier by controlling inter-sheet connections.
Hierarchical schematics can use either Ports Only Global or Sheet
Symbol/Port connections. The latter option is superior for design re-use,
because there is no necessity to fix port name duplications, they become
irrelevant.
With Sheet Symbol/Port Connections, nets are named on the highest level on
which they exist. This can be confusing: we have requested that *if* a net
has a unique named Port, this name should be used instead of the generic
NetXXXX. However, the designer can control this by giving the connections
at the highest level a net label with the appropriate name, which will then
be used.
>1) Can someone explain what these port attributes do?
> Style
Try it. It's a graphical attribute. Convention is that sheet inputs are on
the left of the schematic and point to the right, and sheet outputs are
opposite. To make a port point in one direction or the other, edit the
style or rotate the port with the space bar while it is floating on the
cursor. A bidirectional bus might use the "none" style, which is just a
rectangle. Style has no electrical effect, its purpose is simply to make
the drawing clearer.
> I/O Type
This is used for ERC, see below.
> Alignment
This is also graphical. The "alignment" refers to the position of the port
name inside the port symbol. Again, this is graphical only, it has no
electrical effect.
>2) In this context, does "input" mean that the port acts as an input; i.e., I
>should be driving it with a signal on this sheet, with the destination on
>another sheet? Or does it mean that the signal is an input to this sheet,
>connected to one or more input pins on the sheet, and driven by some other
>sheet?
The default error matrix and I have a little disagreement over that. I'd
suggest that a single sheet taken from a multi-sheet schematic with
restricted net scope (i.e., net labels are *not* global) should properly
ERC if the ports are properly assigned. To do this, I would think that a
port symbol connected to an output would function in the place of an input
on a higher level, or one connected to an output would stand in for a
driver on a higher level. But Protel has used the opposite convention. We
had an extensive discussion of this some time back. Further, the ERC
checking, as I recall, is not as thorough on this point as it could be.
Under my interpretation, an output port on the lower level would connect to
an input sheet entry on the next level up, which would then connect to an
output or to and output sheet entry; so we have an input-output pair on
each level as well as between levels. The default error matrix gives a
green light to any kind of input/output combination between ports and sheet
entries, except that an output sheet entry / input port combination is made
an error. I haven't checked, but I suspect that this refers to a connection
on the same level, not to inter-level connections.
However, I wrote a few months back:
>However, I find that a port connected to an input pin suppresses the
>unconnected and floating warnings for that pin unconditionally, so I
>really do not understand the question. I even set the ERC matrix to show a
>warning for an input port connected to an input pin, and no warning was
>generated. This is a bug, I believe.
Protel was probably aware of the two possible interpretations because the
"create symbol from sheet" tool asks if we want to reverse port I/O types.
However, under *either* interpretation, ports/sheet entry i/o should be
reversed.
My preference (best read with monospaced font, -- represents a wire, > or <
represent signal direction, || is a connection across sheets or from a port
to a sheet entry above):
***Ports global:
output pin --> input port X || output port X --> input pin 1.
|| output port X --> input pin 2.
error condition:
output pin 1 --> input port X || input port X <-- output pin 2
Note that under these conditions, the existence of two input ports in a
design with the same name would be an error condition.
***Sheet Symbol/Port Connections:
output pin --> input port X || output sheet entry X --> input sheet entry Y
|| output port Y --> input pin1
--> input sheet entry
Z || output port Z --> input pin2
--> input pin 3
error conditions:
output pin --><-- output port
input port || input sheet entry
output port || output sheet entry
output sheet entry X --><-- output sheet entry Y
On any individual sheet, two outputs wired together are an error, whether
they be pins, ports, or sheet entries. (Note that two ports with the same
name on the same sheet should properly be flagged as an error regardless of
type; likewise two sheet entries with the same name in the same sheet symbol).
NON-REVERSAL INTERPRETATION, a quick look:
***Ports Global:
output pin --> output port X || input port X -- input pin 1
|| input port X -- input pin 2
***Sheet Symbol/Port Connections
output pin --> output port X || output sheet entry --> input sheet entry ||
input port --> input pin 1
--> input pin 2
Notice that with this interpretation, output ports function like input
pins, whereas output sheet entries function like output pins. It can be
difficult to understand either interpretation, but I find the non-reversal
interpretation more confusing. With non-reversal, ports and sheet entries
do not reverse type. Thus Protel appears to have been written in
contemplation of both interpretations, though the ERC routines are not
completely mature.
> Your perspective completely reverses the interpretation when you're
>looking at a port.
For today, I'm going to leave it that the whole question of port/sheet
entry electrical type needs further examination and work.
WARNING: much of what I have written is how Schematic ERC *should* work,
not necessary how it actually works.
>3) What determines which end of the port is the electrical hot spot? Both
>ends seem to be active.
Yes, both ends are active.
>4) With a netlist setting of Ports Only Global, is there any requirement to
>wire up the sheet entries on the next level up?
No. In fact, wiring on the next level up is ignored, according to the
manual. Hierarchy with Ports Only is only for the purpose of aggregating
individual sheets into a complete schematic. Using it in any other way is
entering Terra Incognita.
>5) Is it smarter to just use power objects instead of ports, and avoid all
>these issues?
I don't think so. Personally, I'd go with Sheet Symbol/Port Connections and
reversal of i/o type between a port symbol and a component pin, likewise
with sheet entries. With extensive design re-use, this is practically the
only way to go, unless you want to wade through a pile of potential
difficult-to-detect errors.
Sheet Symbol/Port Connections has no invisible connections. Giving two nets
or ports intended to be distinct the same name is of no effect unless they
are on the same sheet. Names only matter in two ways: within a sheet or
from a sheet to its sheet symbol. Thus an accidental difference between net
names intended to create a single net, such as OUTPUT1 on one sheet and
0UTPUT1 or OUTPUTl on another is of no effect. It is thus much easier to
check a complex Sheet Symbol/Port schematic. (*Most* net naming errors can
be found by generating and examining a list of nets, but not all).
As to the last error mentioned, it is not a misprint. I was just assigned a
password by SpinCircuit; when I tried to enter it, it didn't work no matter
how careful I was in copying it. Until I realized what was happening. To
some of you, the answer will be obvious, to others it may be quite elusive,
and the issue is not necessarily intelligence. Enjoy!
[EMAIL PROTECTED]
Abdulrahman Lomax
P.O. Box 690
El Verano, CA 95433
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