While trying to find a nice solution for generating interrupt vector tables on ARM, I found that the usually employed solution is to generate weak references to symbols, that are initialized to a single handler. This way an application can override the weak reference, by declaring a new symbol with the same name. While it's possible to do that currently by using some external assembler code, I think a simpler solution could be made by using the weakexternal directive. The infrastructure is already there, but it's used in a slightly different way.

An added bonus of using this new way is that IRQs will branch directly to the handler, instead of first branching to some code that loads the handler address, and then branching to the handler

I've modified the syntax for this directive slightly, so it can take the form "weakexternal ['library'] [name 'name'] [set 'initialvalue'];" instead of "weakexternal ['library'] [name 'name'];"

A short example:
    procedure NoHandler;
    begin
    end;

    procedure TestProc; weakexternal name 'TestProc' set 'NoHandler';
    ...
    begin
       TestProc; // This will call NoHandler
    end.

If we modify the example:
    procedure NoHandler;
    begin
    end;

    procedure TestProcHandler; [public, alias: 'TestProc'];
    begin
    end;

    procedure TestProc; weakexternal name 'TestProc' set 'NoHandler';
    ...
    begin
       TestProc; // This will call TestProcHandler
    end.

All this is done either at compile time, or link time

What do you think about this proposal?

I've put a patch up here: http://j-software.dk/new/weakexternal.txt
And a small example of how lpc21x4.pp, for example, could be modified to use the new functionality: http://j-software.dk/new/lpc21x4.txt
_______________________________________________
fpc-devel maillist  -  fpc-devel@lists.freepascal.org
http://lists.freepascal.org/mailman/listinfo/fpc-devel

Reply via email to