steve smithers schrieb:
Base / Displacement consists of a 16 bit value, the first 4 bits enumerate a register, and the other 12 bits hold a displacement from 0 to 4095. The actual or Effective address for each storage operand is calculated as the unsigned addition of the value held in the base register to the displacement from the instruction itself.
This reminds me of 8086 "real" mode, and 16 bit mode with (far) addresses splitted into segment:offset. Using an 16 bit compiler and syntax (near/far pointers and seg:off notation) would be easier to support a segmented-memory architecture. I also don't see right now how data structures > 4KB could be addressed, without subroutines to map virtual into physical (here seg:off) addresses.
When I had a first look at the 8086 CPU, decades ago, I didn't understand how to handle such a memory architecture in an compiler. Only when I came across the Microsoft compilers and their memory models, I saw how "hints" in the source code would allow an compiler to create efficient machine code. But all these syntax externsions have been stripped from nowadays compilers and languages, so that it will be very hard to support such a dinosaur architecture in an 32/64 bit compiler.
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