Den 13-09-2012 21:41, Florian Klämpfl skrev:
Am 13.09.2012 21:38, schrieb Jeppe Græsdal Johansen:
I have made a preliminary backend and RTL stub in
branches/laksen/avr32new/
Some of the large problems is that the load instructions allow
non-aligned loads in the ld.w forms.
This proves to introduce many
strange problems,
Why is this a problem?
Because PC relative loads with the wide format aren't automatically
aligned to a 4 byte boundary by the processor, and the instruction set
is a variable length 16bit ISA like thumb-2.
There were a few other issues that were highly annoying too, but I can't
remember what they were. Other than that the ISA was beautifully simple.
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