Michael Schnell wrote:
On 12/03/2013 02:34 PM, Mark Morgan Lloyd wrote:
and that the memory provision is fairly meager, it might be more
trouble than it's worth.
The Propeller is so short on closely coupled RAM that even to be able to
use a decent C compiler, someone implemented a "virtual CPU" interpreter
(i.e. "ZPU" architecture) to be run by the propeller core and create
code for this architecture by a gnu c compiler that is provided by same.
So in fact it seems a lot more appropriate to port fpc to ZPU than to
the native propeller core.
ZPU is a "zero register" 32 bit CPU architecture (it only has an up to
32 bit PC and an up to 32 Bit SP - less with memory space below 4 GB).
Each instruction word is 8 bit wide. It is originally designed to be
implemented in an FPGA, bus it also is excellent suited as a target for
an interpreter.
The ZPU architecture description and the C compiler can be obtained
here: http://opensource.zylin.com/zpu.htm
Infos on ZPU, including the Propeller virtual machine can be found t´in
the mailing list zylin-...@zylin.com
Hmm. What with ZPU, LLVM, asm.js, Java bytecode, .NET CLI and no doubt
others, what's needed is some universally-agreed meta-VM or at least a
meta-representation. Tree-Meta, anybody?
--
Mark Morgan Lloyd
markMLl .AT. telemetry.co .DOT. uk
[Opinions above are the author's, not those of his employers or colleagues]
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