On 04/23/2014 02:56 PM, Michael Ring wrote:
this code is for PIC32 ;-)
I did some research on behalf of PIC32.
Here some of my latest results that might be of some interest.
- PIC32 MX uses (cost efficient) "MIPS 4K" Architecture, (40 MHz
chips with a single, 80 MHz chips with two register sets)
- PIX32 MZ (200 MHz) uses "MIPS 14K" Architecture which on top of
faster processing offers some really nice additional features such as
eight register sets, enhanced ability for signal processing (e.g. by
four 64 Bit accumulators and SIMD instructions) enhanced hardware
support for Interrupts.
- you need to do atomic instructions by "read locked / store
conditional" instructions (very similar to modern ARM architectures
Please come back with any questions that I might be able to help with.
(We in fact do active development with the PIC32 in C right now.)
-Michael
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