>Number: 144826 >Category: kern >Synopsis: Add support for bcm5761,bcm5784,bcm5785 gigabyte lan >Confidential: no >Severity: serious >Priority: low >Responsible: freebsd-bugs >State: open >Quarter: >Keywords: >Date-Required: >Class: change-request >Submitter-Id: current-users >Arrival-Date: Wed Mar 17 19:30:01 UTC 2010 >Closed-Date: >Last-Modified: >Originator: Jason Garrett >Release: 9-CURRENT >Organization: >Environment: FreeBSD host.name.omitted 9.0-CURRENT FreeBSD 9.0-CURRENT #0 Tue Mar 16 22:46:09 UTC 2010 r...@host.name.omitted:/usr/obj/usr/src/sys/XEON amd64 >Description: Support for several broadcom gigabit ethernet are not in the bge(4) driver, specifically bcm5761, bcm5784, bcm5785. There is a pactch floating around at http://nccs.christian.net/bge_bcm5784_patch.htm I will include them as .txt files for completeness.
I have installed and tested this patch on 8.0-RELEASE AND 9.0-CURRENT. The patch is working as expected. (I have the BCM5761 on a Dell T3500 workstation). NOTE: These files were not written by me, but contact to the original author has gone unanswered. >How-To-Repeat: Install any supported version of FreeBSD on a machine that utilizes one of these chips. Ethernet driver is not in the tree for these. >Fix: See patches attached. NOTE: Patches that I included are for 8 or later. 7.x patches are on the web page listed. NOTE2: I can only submit one patch, where actually there are 2. Patch attached with submission follows: diff -u -r bge.org/if_bge.c bge/if_bge.c --- bge.org/if_bge.c 2009-06-26 11:45:06.000000000 +0000 +++ bge/if_bge.c 2009-07-27 17:02:40.000000000 +0000 @@ -34,7 +34,8 @@ #include <sys/cdefs.h> __FBSDID("$FreeBSD: src/sys/dev/bge/if_bge.c,v 1.226 2009/06/26 11:45:06 rwatson Exp $"); -/* +/* Patch version 1 + * adapted from openBSD patch to add support for BCM5761,5784,5785 * Broadcom BCM570x family gigabit ethernet driver for FreeBSD. * * The Broadcom BCM5700 is based on technology originally developed by @@ -170,6 +171,7 @@ { BCOM_VENDORID, BCOM_DEVICEID_BCM5720 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5721 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5722 }, + { BCOM_VENDORID, BCOM_DEVICEID_BCM5723 }, /*added by patch*/ { BCOM_VENDORID, BCOM_DEVICEID_BCM5750 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5750M }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5751 }, @@ -184,10 +186,18 @@ { BCOM_VENDORID, BCOM_DEVICEID_BCM5754M }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5755 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5755M }, + { BCOM_VENDORID, BCOM_DEVICEID_BCM5756 }, + { BCOM_VENDORID, BCOM_DEVICEID_BCM5761 }, /*added by patch*/ + { BCOM_VENDORID, BCOM_DEVICEID_BCM5761E }, /*added by patch*/ + { BCOM_VENDORID, BCOM_DEVICEID_BCM5761S }, /*added by patch*/ + { BCOM_VENDORID, BCOM_DEVICEID_BCM5761SE }, /*added by patch*/ + { BCOM_VENDORID, BCOM_DEVICEID_BCM5764 }, /*added by patch*/ { BCOM_VENDORID, BCOM_DEVICEID_BCM5780 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5780S }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5781 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5782 }, + { BCOM_VENDORID, BCOM_DEVICEID_BCM5784 }, /*added by patch*/ + { BCOM_VENDORID, BCOM_DEVICEID_BCM5785 }, /*added by patch*/ { BCOM_VENDORID, BCOM_DEVICEID_BCM5786 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5787 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5787M }, @@ -198,6 +208,10 @@ { BCOM_VENDORID, BCOM_DEVICEID_BCM5903M }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5906 }, { BCOM_VENDORID, BCOM_DEVICEID_BCM5906M }, + { BCOM_VENDORID, BCOM_DEVICEID_BCM57720 }, /*added by patch*/ + { BCOM_VENDORID, BCOM_DEVICEID_BCM57760 }, /*added by patch*/ + { BCOM_VENDORID, BCOM_DEVICEID_BCM57780 }, /*added by patch*/ + { BCOM_VENDORID, BCOM_DEVICEID_BCM57790 }, /*added by patch*/ { SK_VENDORID, SK_DEVICEID_ALTIMA }, @@ -271,6 +285,10 @@ { BGE_CHIPID_BCM5755_A1, "BCM5755 A1" }, { BGE_CHIPID_BCM5755_A2, "BCM5755 A2" }, { BGE_CHIPID_BCM5722_A0, "BCM5722 A0" }, + { BGE_CHIPID_BCM5761_A0, "BCM5761 A0" }, /*added by patch*/ + { BGE_CHIPID_BCM5761_A1, "BCM5761 A1" }, /*added by patch*/ + { BGE_CHIPID_BCM5784_A0, "BCM5784 A0" }, /*added by patch*/ + { BGE_CHIPID_BCM5784_A1, "BCM5784 A1" }, /*added by patch*/ /* 5754 and 5787 share the same ASIC ID */ { BGE_CHIPID_BCM5787_A0, "BCM5754/5787 A0" }, { BGE_CHIPID_BCM5787_A1, "BCM5754/5787 A1" }, @@ -297,9 +315,13 @@ { BGE_ASICREV_BCM5780, "unknown BCM5780" }, { BGE_ASICREV_BCM5714, "unknown BCM5714" }, { BGE_ASICREV_BCM5755, "unknown BCM5755" }, + { BGE_ASICREV_BCM5761, "unknown BCM5761" }, /*added by patch*/ + { BGE_ASICREV_BCM5784, "unknown BCM5784" }, /*added by patch*/ + { BGE_ASICREV_BCM5785, "unknown BCM5785" }, /*added by patch*/ /* 5754 and 5787 share the same ASIC ID */ { BGE_ASICREV_BCM5787, "unknown BCM5754/5787" }, { BGE_ASICREV_BCM5906, "unknown BCM5906" }, + { BGE_ASICREV_BCM57780, "unknown BCM57780" }, /*added by patch*/ { 0, NULL } }; @@ -1758,8 +1780,12 @@ val = BGE_WDMAMODE_ENABLE | BGE_WDMAMODE_ALL_ATTNS; /* Enable host coalescing bug fix. */ - if (sc->bge_asicrev == BGE_ASICREV_BCM5755 || - sc->bge_asicrev == BGE_ASICREV_BCM5787) + if (sc->bge_asicrev == BGE_ASICREV_BCM5755 || /*added by patch*/ + sc->bge_asicrev == BGE_ASICREV_BCM5761 || /*added by patch*/ + sc->bge_asicrev == BGE_ASICREV_BCM5784 || /*added by patch*/ + sc->bge_asicrev == BGE_ASICREV_BCM5785 || /*added by patch*/ + sc->bge_asicrev == BGE_ASICREV_BCM5787 || + sc->bge_asicrev == BGE_ASICREV_BCM57780) /*added by patch*/ val |= 1 << 29; /* Turn on write DMA state machine */ @@ -1768,6 +1794,14 @@ /* Turn on read DMA state machine */ val = BGE_RDMAMODE_ENABLE | BGE_RDMAMODE_ALL_ATTNS; + + if (sc->bge_asicrev == BGE_ASICREV_BCM5784 || /*added by patch*/ + sc->bge_asicrev == BGE_ASICREV_BCM5785 || /*added by patch*/ + sc->bge_asicrev == BGE_ASICREV_BCM5787 || /*added by patch*/ + sc->bge_asicrev == BGE_ASICREV_BCM57780) /*added by patch*/ + val |= BGE_RDMAMODE_BD_SBD_CRPT_ATTN | /*added by patch*/ + BGE_RDMAMODE_MBUF_RBD_CRPT_ATTN | /*added by patch*/ + BGE_RDMAMODE_MBUF_SBD_CRPT_ATTN; /*added by patch*/ if (sc->bge_flags & BGE_FLAG_PCIE) val |= BGE_RDMAMODE_FIFO_LONG_BURST; CSR_WRITE_4(sc, BGE_RDMA_MODE, val); @@ -1789,8 +1823,16 @@ /* Turn on send BD completion state machine */ CSR_WRITE_4(sc, BGE_SBDC_MODE, BGE_SBDCMODE_ENABLE); + + + /* Turn on send data completion state machine */ - CSR_WRITE_4(sc, BGE_SDC_MODE, BGE_SDCMODE_ENABLE); + val = BGE_SDCMODE_ENABLE; /*added by patch*/ + if (sc->bge_asicrev == BGE_ASICREV_BCM5761) /*added by patch*/ + val |= BGE_SDCMODE_CDELAY; /*added by patch*/ + CSR_WRITE_4(sc, BGE_SDC_MODE, val); /*added by patch*/ + /*CSR_WRITE_4(sc, BGE_SDC_MODE, BGE_SDCMODE_ENABLE); */ + /*deleted by Patch*/ /* Turn on send data initiator state machine */ CSR_WRITE_4(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE); @@ -2411,8 +2453,13 @@ /* Save various chip information. */ sc->bge_chipid = - pci_read_config(dev, BGE_PCI_MISC_CTL, 4) & - BGE_PCIMISCCTL_ASICREV; + (pci_read_config(dev, BGE_PCI_MISC_CTL, 4) + >> BGE_PCIMISCCTL_ASICREV_SHIFT); /*added by patch*/ + + if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_USE_PRODID_REG) { /*added by patch*/ + sc->bge_chipid = pci_read_config(dev, BGE_PCI_PRODID_ASICREV, 4); /*added by patch*/ + } /*added by patch*/ + sc->bge_asicrev = BGE_ASICREV(sc->bge_chipid); sc->bge_chiprev = BGE_CHIPREV(sc->bge_chipid); @@ -2445,8 +2492,12 @@ case BGE_ASICREV_BCM5750: case BGE_ASICREV_BCM5752: case BGE_ASICREV_BCM5755: + case BGE_ASICREV_BCM5761: /*added by patch*/ + case BGE_ASICREV_BCM5784: /*added by patch*/ + case BGE_ASICREV_BCM5785: /*added by patch*/ case BGE_ASICREV_BCM5787: case BGE_ASICREV_BCM5906: + case BGE_ASICREV_BCM57780: /*added by patch*/ sc->bge_flags |= BGE_FLAG_575X_PLUS; /* FALLTHROUGH */ case BGE_ASICREV_BCM5705: @@ -2464,12 +2515,17 @@ if (sc->bge_chipid == BGE_CHIPID_BCM5704_A0) sc->bge_flags |= BGE_FLAG_5704_A0_BUG; if (BGE_IS_5705_PLUS(sc) && - !(sc->bge_flags & BGE_FLAG_ADJUST_TRIM)) { + (sc->bge_asicrev != BGE_ASICREV_BCM5906) && /*added by patch*/ + (sc->bge_asicrev != BGE_ASICREV_BCM5785) && /*added by patch*/ + (sc->bge_asicrev != BGE_ASICREV_BCM57780) && /*added by patch*/ + !(sc->bge_flags & BGE_FLAG_ADJUST_TRIM)) { if (sc->bge_asicrev == BGE_ASICREV_BCM5755 || + sc->bge_asicrev == BGE_ASICREV_BCM5761 || /*added by patch*/ + sc->bge_asicrev == BGE_ASICREV_BCM5784 || /*added by patch*/ sc->bge_asicrev == BGE_ASICREV_BCM5787) { if (sc->bge_chipid != BGE_CHIPID_BCM5722_A0) sc->bge_flags |= BGE_FLAG_JITTER_BUG; - } else if (sc->bge_asicrev != BGE_ASICREV_BCM5906) + } else /*added by patch*/ sc->bge_flags |= BGE_FLAG_BER_BUG; } diff -u -r bge.org/if_bgereg.h bge/if_bgereg.h --- bge.org/if_bgereg.h 2009-03-23 14:36:50.000000000 +0000 +++ bge/if_bgereg.h 2009-07-27 17:04:08.000000000 +0000 @@ -33,7 +33,8 @@ * $FreeBSD: src/sys/dev/bge/if_bgereg.h,v 1.83 2009/03/23 14:36:50 marius Exp $ */ -/* +/* Patch version 1 + * adapted from openBSD patch to add support for BCM5761,5784,5785 * BCM570x memory map. The internal memory layout varies somewhat * depending on whether or not we have external SSRAM attached. * The BCM5700 can have up to 16MB of external memory. The BCM5701 @@ -218,6 +219,7 @@ #define BGE_PCI_UNDI_TX_BD_PRODIDX_LO 0xAC #define BGE_PCI_ISR_MBX_HI 0xB0 #define BGE_PCI_ISR_MBX_LO 0xB4 +#define BGE_PCI_PRODID_ASICREV 0xBC /*added by patch*/ /* PCI Misc. Host control register */ #define BGE_PCIMISCCTL_CLEAR_INTA 0x00000001 @@ -229,6 +231,7 @@ #define BGE_PCIMISCCTL_REG_WORDSWAP 0x00000040 #define BGE_PCIMISCCTL_INDIRECT_ACCESS 0x00000080 #define BGE_PCIMISCCTL_ASICREV 0xFFFF0000 +#define BGE_PCIMISCCTL_ASICREV_SHIFT 16 /*added by patch*/ #define BGE_HIF_SWAP_OPTIONS (BGE_PCIMISCCTL_ENDIAN_WORDSWAP) #if BYTE_ORDER == LITTLE_ENDIAN @@ -245,6 +248,7 @@ (BGE_HIF_SWAP_OPTIONS|BGE_PCIMISCCTL_CLEAR_INTA| \ BGE_PCIMISCCTL_MASK_PCI_INTR|BGE_PCIMISCCTL_INDIRECT_ACCESS) +/* removed by patch #define BGE_CHIPID_TIGON_I 0x40000000 #define BGE_CHIPID_TIGON_II 0x60000000 #define BGE_CHIPID_BCM5700_A0 0x70000000 @@ -255,7 +259,7 @@ #define BGE_CHIPID_BCM5700_B3 0x71030000 #define BGE_CHIPID_BCM5700_ALTIMA 0x71040000 #define BGE_CHIPID_BCM5700_C0 0x72000000 -#define BGE_CHIPID_BCM5701_A0 0x00000000 /* grrrr */ +#define BGE_CHIPID_BCM5701_A0 0x00000000 #define BGE_CHIPID_BCM5701_B0 0x01000000 #define BGE_CHIPID_BCM5701_B2 0x01020000 #define BGE_CHIPID_BCM5701_B5 0x01050000 @@ -302,9 +306,75 @@ #define BGE_CHIPID_BCM5787_A2 0xb0020000 #define BGE_CHIPID_BCM5906_A1 0xc0010000 #define BGE_CHIPID_BCM5906_A2 0xc0020000 +removed by patch */ + +#define BGE_CHIPID_TIGON_I 0x4000 +#define BGE_CHIPID_TIGON_II 0x6000 +#define BGE_CHIPID_BCM5700_A0 0x7000 +#define BGE_CHIPID_BCM5700_A1 0x7001 +#define BGE_CHIPID_BCM5700_B0 0x7100 +#define BGE_CHIPID_BCM5700_B1 0x7101 +#define BGE_CHIPID_BCM5700_B2 0x7102 +#define BGE_CHIPID_BCM5700_B3 0x7103 +#define BGE_CHIPID_BCM5700_ALTIMA 0x7104 +#define BGE_CHIPID_BCM5700_C0 0x7200 +#define BGE_CHIPID_BCM5701_A0 0x0000 /* grrrr */ +#define BGE_CHIPID_BCM5701_B0 0x0100 +#define BGE_CHIPID_BCM5701_B2 0x0102 +#define BGE_CHIPID_BCM5701_B5 0x0105 +#define BGE_CHIPID_BCM5703_A0 0x1000 +#define BGE_CHIPID_BCM5703_A1 0x1001 +#define BGE_CHIPID_BCM5703_A2 0x1002 +#define BGE_CHIPID_BCM5703_A3 0x1003 +#define BGE_CHIPID_BCM5703_B0 0x1100 +#define BGE_CHIPID_BCM5704_A0 0x2000 +#define BGE_CHIPID_BCM5704_A1 0x2001 +#define BGE_CHIPID_BCM5704_A2 0x2002 +#define BGE_CHIPID_BCM5704_A3 0x2003 +#define BGE_CHIPID_BCM5704_B0 0x2100 +#define BGE_CHIPID_BCM5705_A0 0x3000 +#define BGE_CHIPID_BCM5705_A1 0x3001 +#define BGE_CHIPID_BCM5705_A2 0x3002 +#define BGE_CHIPID_BCM5705_A3 0x3003 +#define BGE_CHIPID_BCM5750_A0 0x4000 +#define BGE_CHIPID_BCM5750_A1 0x4001 +#define BGE_CHIPID_BCM5750_A3 0x4003 +#define BGE_CHIPID_BCM5750_B0 0x4100 +#define BGE_CHIPID_BCM5750_B1 0x4101 +#define BGE_CHIPID_BCM5750_C0 0x4200 +#define BGE_CHIPID_BCM5750_C1 0x4201 +#define BGE_CHIPID_BCM5750_C2 0x4202 +#define BGE_CHIPID_BCM5714_A0 0x5000 +#define BGE_CHIPID_BCM5761_A0 0x5761000 +#define BGE_CHIPID_BCM5761_A1 0x5761100 +#define BGE_CHIPID_BCM5784_A0 0x5784000 +#define BGE_CHIPID_BCM5784_A1 0x5784100 +#define BGE_CHIPID_BCM5714_A0 0x5000 +#define BGE_CHIPID_BCM5752_A0 0x6000 +#define BGE_CHIPID_BCM5752_A1 0x6001 +#define BGE_CHIPID_BCM5752_A2 0x6002 +#define BGE_CHIPID_BCM5714_B0 0x8000 +#define BGE_CHIPID_BCM5714_B3 0x8003 +#define BGE_CHIPID_BCM5715_A0 0x9000 +#define BGE_CHIPID_BCM5715_A1 0x9001 +#define BGE_CHIPID_BCM5715_A3 0x9003 +#define BGE_CHIPID_BCM5755_A0 0xa000 +#define BGE_CHIPID_BCM5755_A1 0xa001 +#define BGE_CHIPID_BCM5755_A2 0xa002 +#define BGE_CHIPID_BCM5722_A0 0xa200 +#define BGE_CHIPID_BCM5754_A0 0xb000 +#define BGE_CHIPID_BCM5754_A1 0xb001 +#define BGE_CHIPID_BCM5754_A2 0xb002 +#define BGE_CHIPID_BCM5787_A0 0xb000 +#define BGE_CHIPID_BCM5787_A1 0xb001 +#define BGE_CHIPID_BCM5787_A2 0xb002 +#define BGE_CHIPID_BCM5906_A1 0xc001 +#define BGE_CHIPID_BCM5906_A2 0xc002 /* shorthand one */ -#define BGE_ASICREV(x) ((x) >> 28) +/*#define BGE_ASICREV(x) ((x) >> 28)*/ +/*deleated by patch*/ +#define BGE_ASICREV(x) ((x) >> 12) /*added by patch*/ #define BGE_ASICREV_BCM5701 0x00 #define BGE_ASICREV_BCM5703 0x01 #define BGE_ASICREV_BCM5704 0x02 @@ -319,9 +389,16 @@ #define BGE_ASICREV_BCM5754 0x0b #define BGE_ASICREV_BCM5787 0x0b #define BGE_ASICREV_BCM5906 0x0c +#define BGE_ASICREV_USE_PRODID_REG 0x0f /*added by patch*/ +#define BGE_ASICREV_BCM5761 0x5761 /*added by patch*/ +#define BGE_ASICREV_BCM5784 0x5784 /*added by patch*/ +#define BGE_ASICREV_BCM5785 0x5785 /*added by patch*/ +#define BGE_ASICREV_BCM57780 0x57780 /*added by patch*/ /* chip revisions */ -#define BGE_CHIPREV(x) ((x) >> 24) +/*#define BGE_CHIPREV(x) ((x) >> 24)*/ +/*deleted by patch*/ +#define BGE_CHIPREV(x) ((x) >> 8) /*added by patch*/ #define BGE_CHIPREV_5700_AX 0x70 #define BGE_CHIPREV_5700_BX 0x71 #define BGE_CHIPREV_5700_CX 0x72 @@ -331,6 +408,8 @@ #define BGE_CHIPREV_5704_BX 0x21 #define BGE_CHIPREV_5750_AX 0x40 #define BGE_CHIPREV_5750_BX 0x41 +#define BGE_CHIPREV_5761_AX 0x57611 /*added by patch*/ +#define BGE_CHIPREV_5784_AX 0x57841 /*added by patch*/ /* PCI DMA Read/Write Control register */ #define BGE_PCIDMARWCTL_MINDMA 0x000000FF @@ -800,7 +879,9 @@ #define BGE_MIMODE_SHORTPREAMBLE 0x00000002 #define BGE_MIMODE_AUTOPOLL 0x00000010 -#define BGE_MIMODE_CLKCNT 0x001F0000 +#define BGE_MIMODE_500KHZ_CONST 0x00008000 /*added by patch*/ +#define BGE_MIMODE_CLKCNT 0x001F0000 +#define BGE_MIMODE_BASE 0x000C0000 /*added by patch*/ /* @@ -941,7 +1022,8 @@ /* Send BD Completion Control Mode register */ #define BGE_SBDCMODE_RESET 0x00000001 #define BGE_SBDCMODE_ENABLE 0x00000002 -#define BGE_SBDCMODE_ATTN 0x00000004 +#define BGE_SBDCMODE_ATTN 0x00000004 +#define BGE_SDCMODE_CDELAY 0x00000010 /*added by patch*/ /* Send BD Completion Control Status register */ #define BGE_SBDCSTAT_ATTN 0x00000004 @@ -1378,6 +1460,9 @@ #define BGE_RDMAMODE_PCI_FIFOOREAD_ATTN 0x00000100 #define BGE_RDMAMODE_LOCWRITE_TOOBIG 0x00000200 #define BGE_RDMAMODE_ALL_ATTNS 0x000003FC +#define BGE_RDMAMODE_BD_SBD_CRPT_ATTN 0x00000800 /*added by patch*/ +#define BGE_RDMAMODE_MBUF_RBD_CRPT_ATTN 0x00001000 /*added by patch*/ +#define BGE_RDMAMODE_MBUF_SBD_CRPT_ATTN 0x00002000 /*added by patch*/ #define BGE_RDMAMODE_FIFO_SIZE_128 0x00020000 #define BGE_RDMAMODE_FIFO_LONG_BURST 0x00030000 @@ -2101,6 +2186,7 @@ #define BCOM_DEVICEID_BCM5720 0x1658 #define BCOM_DEVICEID_BCM5721 0x1659 #define BCOM_DEVICEID_BCM5722 0x165A +#define BCOM_DEVICEID_BCM5723 0x165b /*added by patch*/ #define BCOM_DEVICEID_BCM5750 0x1676 #define BCOM_DEVICEID_BCM5750M 0x167C #define BCOM_DEVICEID_BCM5751 0x1677 @@ -2114,11 +2200,19 @@ #define BCOM_DEVICEID_BCM5754 0x167A #define BCOM_DEVICEID_BCM5754M 0x1672 #define BCOM_DEVICEID_BCM5755 0x167B +#define BCOM_DEVICEID_BCM5756 0x1674 /*added by patch*/ #define BCOM_DEVICEID_BCM5755M 0x1673 +#define BCOM_DEVICEID_BCM5761 0x1681 /*added by patch*/ +#define BCOM_DEVICEID_BCM5761E 0x1680 /*added by patch*/ +#define BCOM_DEVICEID_BCM5761S 0x1688 /*added by patch*/ +#define BCOM_DEVICEID_BCM5761SE 0x1689 /*added by patch*/ +#define BCOM_DEVICEID_BCM5764 0x1684 /*added by patch*/ #define BCOM_DEVICEID_BCM5780 0x166A #define BCOM_DEVICEID_BCM5780S 0x166B #define BCOM_DEVICEID_BCM5781 0x16DD #define BCOM_DEVICEID_BCM5782 0x1696 +#define BCOM_DEVICEID_BCM5784 0x1698 /*added by patch*/ +#define BCOM_DEVICEID_BCM5785 0x1699 /*added by patch*/ #define BCOM_DEVICEID_BCM5786 0x169A #define BCOM_DEVICEID_BCM5787 0x169B #define BCOM_DEVICEID_BCM5787M 0x1693 @@ -2129,6 +2223,11 @@ #define BCOM_DEVICEID_BCM5903M 0x16FF #define BCOM_DEVICEID_BCM5906 0x1712 #define BCOM_DEVICEID_BCM5906M 0x1713 +#define BCOM_DEVICEID_BCM57720 0x168c /*added by patch*/ +#define BCOM_DEVICEID_BCM57760 0x1690 /*added by patch*/ +#define BCOM_DEVICEID_BCM57780 0x1692 /*added by patch*/ +#define BCOM_DEVICEID_BCM57790 0x1694 /*added by patch*/ + /* * Alteon AceNIC PCI vendor/device ID. @@ -2568,8 +2667,8 @@ #define BGE_FLAG_CRC_BUG 0x08000000 #define BGE_FLAG_5788 0x20000000 uint32_t bge_chipid; - uint8_t bge_asicrev; - uint8_t bge_chiprev; + uint32_t bge_asicrev; /*changed by patch*/ + uint16_t bge_chiprev; /*changed by patch*/ uint8_t bge_asf_mode; uint8_t bge_asf_count; struct bge_ring_data bge_ldata; /* rings */ >Release-Note: >Audit-Trail: >Unformatted: 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