On 08/30/13 08:09, Lundberg, Johannes wrote:
What I got so far is this;
USB driver from current stops after
xhci0: 32 byte context size
While driver from 9.1 continues to the next step which is
usbus0 on xhci0
xhci0: usbpf: Attached
...
I can try adding some printf's in the code and see if I get some more..
Hi,
There are only a few commits to the xhci driver since 9.1 was releases,
so this should be easy to figure out.
I'm doing a wild guess. Can you try the attached patch. It will ensure
that any BIOS generated interrupts get cleared before we reset the
controller.
--HPS
=== sys/dev/usb/controller/xhci.c
==================================================================
--- sys/dev/usb/controller/xhci.c (revision 254832)
+++ sys/dev/usb/controller/xhci.c (local)
@@ -320,6 +320,12 @@
device_printf(sc->sc_bus.parent, "32 byte context size.\n");
}
+ temp = XREAD4(sc, oper, XHCI_USBSTS);
+ /* clear all pending interrupts */
+ XWRITE4(sc, oper, XHCI_USBSTS, temp);
+ /* clear and disable leftover interrupts */
+ XWRITE4(sc, runt, XHCI_IMAN(0), XHCI_IMAN_INTR_PEND);
+
/* Reset controller */
XWRITE4(sc, oper, XHCI_USBCMD, XHCI_CMD_HCRST);
@@ -385,10 +391,6 @@
sc->sc_exit_lat_max = XHCI_HCS3_U1_DEL(temp) +
XHCI_HCS3_U2_DEL(temp) + 250 /* us */;
- temp = XREAD4(sc, oper, XHCI_USBSTS);
-
- /* clear interrupts */
- XWRITE4(sc, oper, XHCI_USBSTS, temp);
/* disable all device notifications */
XWRITE4(sc, oper, XHCI_DNCTRL, 0);
@@ -462,11 +464,8 @@
XWRITE4(sc, runt, XHCI_ERSTBA_HI(0), (uint32_t)(addr >> 32));
/* Setup interrupter registers */
+ XWRITE4(sc, runt, XHCI_IMAN(0), XHCI_IMAN_INTR_ENA);
- temp = XREAD4(sc, runt, XHCI_IMAN(0));
- temp |= XHCI_IMAN_INTR_ENA;
- XWRITE4(sc, runt, XHCI_IMAN(0), temp);
-
/* setup command ring control base address */
addr = buf_res.physaddr;
addr += (uintptr_t)&((struct xhci_hw_root *)0)->hwr_commands[0];
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