On 05/08/2019 11:31 pm, Mark Johnston wrote:
On Wed, May 08, 2019 at 11:01:58PM -0500, Larry Rosenman wrote:
On 05/08/2019 10:32 pm, Mark Johnston wrote:
> On Wed, May 08, 2019 at 05:57:18PM -0500, Larry Rosenman wrote:
>> On 05/08/2019 5:55 pm, Mark Johnston wrote:
>> > On Wed, May 08, 2019 at 05:47:08PM -0500, Larry Rosenman wrote:
>> >> On 05/08/2019 5:29 pm, Mark Johnston wrote:
>> >> > On Wed, May 08, 2019 at 03:52:45PM -0500, Larry Rosenman wrote:
>> >> >> Greetings,
>> >> >>
>> >> >> Somewhere between r346483 and r347241 loading dtraceall causes a
>> >> >> crash. I have the cores and kernels.
>> >> >>
>> >> >> It's hard for me to bisect more than this, as the box is remote.
>> >> >>
>> >> >> What more do you need? (this dump is fropm r347355).
>> >> >
> The problem is with the kernel linker's handling of ifuncs. When
> enumerating symbols, it replaces ifunc symbol values with the return
> value of the resolver but preserves the original symbol size, which is
> that of the resolver. I believe this patch will address the panic
> you're seeing:
It does *NOT*.
I see, my theory above is not the real problem here. The resolver for
x86_rng_store() may return NULL, which we do not expect. Can you show
the CPU info and features lines from the dmesg to confirm?
Also see if this patch helps:
diff --git a/sys/dev/random/ivy.c b/sys/dev/random/ivy.c
index 57f3d0a1d80b..71065d788cf9 100644
@@ -97,6 +97,13 @@ x86_rdseed_store(u_long *buf)
+x86_dead_store(u_long *buf __unused)
+ panic("missing hardware PRNG support");
DEFINE_IFUNC(static, int, x86_rng_store, (u_long *buf), static)
has_rdrand = (cpu_feature2 & CPUID2_RDRAND);
@@ -107,7 +114,7 @@ DEFINE_IFUNC(static, int, x86_rng_store, (u_long
else if (has_rdrand)
- return (NULL);
+ return (x86_dead_store);
/* It is required that buf length is a multiple of sizeof(u_long). */
The above patch (on top of the previous one) fixes the crash.
flags/features as requested:
CPU: Intel(R) Xeon(R) CPU E5440 @ 2.83GHz (2826.30-MHz
Origin="GenuineIntel" Id=0x1067a Family=0x6 Model=0x17 Stepping=10
TSC: P-state invariant, performance statistics
Larry Rosenman http://people.freebsd.org/~ler
Phone: +1 214-642-9640 E-Mail: l...@freebsd.org
US Mail: 5708 Sabbia Dr, Round Rock, TX 78665-2106
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