On Wed, Jun 20, 2001 at 05:39:55PM -0400, Andrew Gallatin wrote:
> While we're at it, I know that the AMD AthlonMP supports SSE, but I
> can't seem to find which bits they're using in their features for it.
> It would be nice if somebody who knew that spoke up so that we
> supported SSE on Palamino right off the bat..
Is this page any good to you:
http://www.sandpile.org/ia32/cpuid.htm
Otherwise, maybe we can ask someone in AMD.
David.
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