Kenneth Culver wrote:
> > There's actually a seperate TLB bug, but FreeBSD doesn't
> > trigger that one, either (Linux can tickle it, when there
> > are certain specific circumstances met).
> Well, I think I know what you're talking about, linux allocates agpgart
> memory without setting a "non-cacheable" bit, and then the agp card writes
> to that memory, but the cpu cached it already, which makes the cache wrong
> or something like that, and causes the crashes/hangs. I know this is a
> greatly simplified version of the real problem, but I think this is a
> linux bug not necesarily an amd bug.

No, you are describing the coherency bug in the chipset
used for the AGP with AMD processors, which should enforce
a coherency cycle, and cache invalidation for AGP based
writes of the shared memory region.  They are treating it
as if it were non-cacheable dual ported SDRAM.

There *really* is a bug in P4 and above and in late model
AMD chips with 4M pages.  It is very easy to reproduce with
a few small kernel modifications (to actively use 4M pages)
and 256M-512M of RAM.

I'll characterize it further and provide the software
workaround, for $10,000.  It's about 16 machine instructions,
if you write it out as code.

Meanwhile, Linux and Windows can keep turning off the PSE,
and losing 4-14% of their performance, depending on their

-- Terry

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