I'm not fluent in x86 asm, so can you confirm for me what you're
attempting to do here?

I think you're making critical_enter()/critical_exit() cheaper by not
actually messing with the interrupt hardware when they're called.
Very much like what we do in 4-stable.

Instead, you set/clear a per-cpu flag (or incr/decr a counter). If an
interrupt comes in when you're inside a critical section, you make
note of it & mask interrupts on that cpu.  In critical_exit(),
you run the interrupt handler if there's a pending interrupt, and
unmask interrupts.  If there's not a pending interrupt, you just clear
the flag (or devrement a counter).

Is that basically it?

If so, I'm wondering if this is even possible on alpha, where we don't
have direct access to the hardware.  However, according to the psuedo
code for rti in the Brown book, munging with the saved PSL in
trapframe to set the IPL should work.  Hmm..


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