At Fri, 24 May 2002 10:25:53 -0400 (EDT), John Baldwin wrote:
> Hey gang, although Intel's document seems to claim that they tested
> proper operation of pause I'd like people with non-Intel processors
> to verify that it actually works.

It works fine on my Transmeta Crusoe TM5600, about as non-intel as you can get:

Testing PAUSE instruction:
Register esp changed: 0xbfbffa0c -> 0xbfbff9d0

dmesg excerpt:

FreeBSD 5.0-CURRENT #0: Sun Apr 28 16:02:43 GMT 2002
CPU: Transmeta(tm) Crusoe(tm) Processor TM5600 (595.50-MHz 586-class CPU)
  Origin = "GenuineTMx86"  Id = 0x543
real memory  = 184483840 (180160K bytes)
avail memory = 174391296 (170304K bytes)


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