> From: Ducrot Bruno [mailto:[EMAIL PROTECTED]] 
> there is a little detail that I don't understand actually.  When we
> want to enter S4 in:
> sys/contrib/dev/acpica/hwsleep.c::AcpiEnterSleepState
> we have to fill PM1AControl and PM1BControl with some values 
> deduced by
> the DSDT.  Those values are different, and I am ok with that 
> for S1, S2, etc.
> But for S4 and S5, there are different too.  If I am correct, 
> this implied
> a different glue logic for the hardware.  What is the 
> difference expected
> for S4 and S5?

Good question. On some systems (IBM T20) the values for SLP_TYP registers on
the PM1A and 1B Control blocks are the same for S4 and S5. On some (IBM T23)
the values between S4 and S5 are different.

The only possible difference appears in which wake events might be enabled
for the two states.

Regards -- Andy

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