On Fri, 21 May 1999, Ladavac Marino wrote: > > -----Original Message----- > > From: Mike Smith [SMTP:[email protected]] > > Sent: Friday, May 21, 1999 2:16 AM > > To: Joel Ray Holveck > > Cc: Doug Rabson; Peter Wemm; Tommy Hallgren; > > [email protected] > > Subject: Re: Lazy SPLs > > > > > > > > Why mask out the interrupts at all, instead of queuing them in > > handler > > > level? > > > > Level-triggered interrupts are persistent conditions, not queueable > > events. They typically require device-driver level intervention to be > > > > cleared. This is a major error in the PCI design (no surprises > > there). > > > [ML] Whoa there! That's the MAJOR advantage of PCI design. > Open collector, active low, level triggered interrupts are the only > possibility for interupt line sharing without programmatically > accessible registers on card which say "yes, I am still interrupting". > > Active high, edge triggered interrupts are an abomination (there > is no way to reliably share the interrupt line and you cannot even wire > or it). They are the reason why one never has enough interrupt lines on > ISA.
Interrupt sharing sucks. The processor should have more interrupt inputs. Modern alpha systems typically have as many interrupt inputs as there are pci slots * interrupt pins. -- Doug Rabson Mail: [email protected] Nonlinear Systems Ltd. Phone: +44 181 442 9037 To Unsubscribe: send mail to [email protected] with "unsubscribe freebsd-hackers" in the body of the message
