On Sat, Jan 20, 2001 at 04:18:35PM +0100, Nicolas Souchu wrote:
> Hi folks,
>
> I have a problem with R4.2. The device driver I'm currently
> writing can't retrieve correctly the value from a PCI configuration
> register. What is strange is that when using the pciconf tool I get
> the result I expect, not with pci_read_config().
>
> pciconf -r pci0:7:3: 0x48 returns 0x00006001
>
> but
>
> value = pci_read_config(dev, 0x48, 4); returns 0x6 !!!
>
Here is some more testing:
Reading any configuration register gives 0x6!
But
when creating a cfg structure with bus=0, slot=7 and func=3 in the
attach routine then pass it to pci_cfgread(), it works. Also, when
querying the pci bus with BUS_READ_IVAR() for BUS, SLOT and FUNC,
I get 0,7,3.
What is the hose field?
Note also that I had to return NULL on the detection of the device
0x30401106 in pcisupport.c pcib_match() because it has a bridge class and the
pcib driver was attached to it before viapm.
Here is the piece of code:
static int
viapm_attach(device_t dev)
{
u_int32_t l, base_cfgreg;
u_int16_t s;
u_int8_t c;
struct viapm_data *viapm;
struct resource *res;
device_t bitbang;
pcicfgregs cfg;
if (!(viapm = (struct viapm_data *)device_get_softc(dev)))
return ENXIO;
bzero(viapm, sizeof(struct viapm_data));
l = pci_read_config(dev, 0x8, 1);
printf("%s: rev id 0x%x\n", __FUNCTION__, l);
## returns 0x6! Which is stupid
switch (l) {
case VIAPM_OEM_REV_E:
base_cfgreg = VIAPM_CFG_3040E_BASE;
/* Activate IO block access */
s = pci_read_config(dev, VIAPM_CFG_3040E_ACTIV, 2);
pci_write_config(dev, VIAPM_CFG_3040F_ACTIV,
s | VIAPM_ACTIV_E_MASK, 2);
break;
case VIAPM_OEM_REV_F:
case VIAPM_PROD_REV_A:
default:
base_cfgreg = VIAPM_CFG_3040F_BASE;
/* Activate IO block access */
c = pci_read_config(dev, VIAPM_CFG_3040F_ACTIV, 1);
pci_write_config(dev, VIAPM_CFG_3040F_ACTIV,
c | VIAPM_ACTIV_F_MASK, 1);
break;
}
cfg.hose = -1;
cfg.bus = 0;
cfg.slot = 7;
cfg.func = 3;
l = pci_cfgread(&cfg, VIAPM_CFG_3040F_BASE, 4);
printf("%s: base addr 0x%x\n", __FUNCTION__, l);
## return 0x6001! the correct value
BUS_READ_IVAR(device_get_parent(dev), dev, PCI_IVAR_BUS, &l);
printf("bus=%d\n", l);
BUS_READ_IVAR(device_get_parent(dev), dev, PCI_IVAR_SLOT, &l);
printf("slot=%d\n", l);
BUS_READ_IVAR(device_get_parent(dev), dev, PCI_IVAR_FUNCTION, &l);
printf("func=%d\n", l);
## return 0,7,3
if (!(res = bus_alloc_resource(dev, SYS_RES_IOPORT, &base_cfgreg,
0l, ~0l, 1, RF_ACTIVE))) {
device_printf(dev, "could not allocate bus space\n");
return ENXIO;
}
viapm->st = rman_get_bustag(res);
viapm->sh = rman_get_bushandle(res);
printf("viapm: 0x%x and 0x%x\n", viapm->st, viapm->sh);
VIAPM_OUTB(GPIO_DIR, VIAPM_INB(GPIO_DIR) | VIAPM_SCL | VIAPM_SDA);
device_printf(dev, "attaching bitbanging...\n");
/* add generic bit-banging code */
if (!(bitbang = device_add_child(dev, "iicbb", -1)))
return ENXIO;
return (device_probe_and_attach(bitbang));
}
--
[EMAIL PROTECTED]
Alcôve - Open Source Software Engineer - http://www.alcove.fr
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