On Thu, Jul 26, 2001 at 03:49:58PM -0700, John Baldwin wrote:
> > That does set, not test-and-set. What I want is exactly what the Intel
> > BTS instruction does: atomically test and set a bit.
> 
> Unfortunately that is very ia32 specific.  The code would be more
> friendly on alpha and ia64 at least if the algo was changed to use
> cmpset on a word instead of test-and-set of a bit.

Another way to look at it is as an IA-32 specific optimization. For 
other architectures, we could just use the code you posted earlier.

> If you want, I can look at the code to see where it uses test_and_set()
> to determine how hard that would be.  (It might be very easy to do.)

The piece of code which uses it is attached.

        -Arun

inline 
void acquire_header_lock (volatile POINTER_SIZE_INT *p_header)
{
    while (true) {
        // Try to grab the lock.
        volatile PVOID free_header =(PVOID)(*p_header & BUSY_FORWARDING_BIT_MASK);
        volatile PVOID locked_header =(PVOID)((POINTER_SIZE_INT)free_header | 
BUSY_FORWARDING_BIT);
        assert (locked_header != free_header);

        // IA64 - What are the semantics of test_and_set_bit with regards to acq and 
rel?
        // Hopefully, test_and_set_bit will have acquire semantics and
        // test_and_clear_bit will have release semantics.
        if ( test_and_set_bit (BUSY_FORWARDING_BIT_OFFSET, (PVOID *)p_header) == 0) 
        {
            assert ((*p_header & BUSY_FORWARDING_BIT) == BUSY_FORWARDING_BIT);

            return; // got it this is the only way out.
        }
        // Try until you get the lock.
        
        while ((*p_header & BUSY_FORWARDING_BIT) == BUSY_FORWARDING_BIT) {
          Sleep (0); // Sleep until it might be free.
        }
    }
}

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