> >There are a couple of rules in PCI you must have in mind when >synchronization between PCI devices is needed. > >1) Interrupts are not synchronization events. They just send attention to > the device driver (acts as SIGIO, for example). Some bridge may flush > posted buffers on interrupt, but since interrupt can be shared, you > must not rely on such mechanism.
The exception to this rule are Message Signaled Interrupts. The interrupt is asserted by DMAing a token into a mailbox in the chipset. Since posted writes must complete in order, this mechanism guarantees that the interrupt is only asserted once any previous writes have completed. MSI is part of the PCI 2.2 spec, but may only start to be supported in upcoming PCI-X chipsets. I don't know when FreeBSD will gain support for MSI. -- Justin To Unsubscribe: send mail to [EMAIL PROTECTED] with "unsubscribe freebsd-hackers" in the body of the message
