I would appreciate if people that have SIS Ethernet controllers to test
out this patch.  I added support for the 630ET based on the changes
in the Linux driver.  It seems to work fine.

I'd like to get some "yes it doesn't break anything" or "heh, now my
SIS Ethernet controller works now" comments before commiting this change.
The patch is based on -stable right now.  It applies to -current cleanly.
BTW I tested this on a Asus TUSI motherboard.

Thanks,

Doug A.

Index: if_sis.c
===================================================================
RCS file: /cvs/src/sys/pci/if_sis.c,v
retrieving revision 1.13.4.16
diff -c -r1.13.4.16 if_sis.c
*** if_sis.c    18 Dec 2001 02:33:27 -0000      1.13.4.16
--- if_sis.c    2 Jan 2002 20:54:06 -0000
***************
*** 147,152 ****
--- 147,153 ----
  #ifdef __i386__
  static void sis_read_cmos     __P((struct sis_softc *, device_t, caddr_t,
                                                        int, int));
+ static void sis_read_mac      __P((struct sis_softc *, device_t, caddr_t));
  static device_t sis_find_bridge       __P((device_t));
  #endif
  
***************
*** 439,444 ****
--- 440,473 ----
        pci_write_config(bridge, 0x48, reg & ~0x40, 1);
        return;
  }
+ 
+ static void sis_read_mac(sc, dev, dest)
+       struct sis_softc        *sc;
+       device_t                dev;
+       caddr_t                 dest;
+ {
+       u_int32_t               save;
+       u_int32_t               save2;
+ 
+       save = CSR_READ_4(sc, SIS_RXFILT_CTL);
+       save2 = CSR_READ_4(sc, SIS_CSR);
+ 
+       CSR_WRITE_4(sc, SIS_CSR, SIS_CSR_RELOAD | save);
+       CSR_WRITE_4(sc, SIS_CSR, 0);
+               
+       CSR_WRITE_4(sc, SIS_RXFILT_CTL, save & ~SIS_RXFILTCTL_ENABLE);
+ 
+       CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR0);
+       ((u_int16_t *)dest)[0] = CSR_READ_4(sc, SIS_RXFILT_DATA);
+       CSR_WRITE_4(sc, SIS_RXFILT_CTL,SIS_FILTADDR_PAR1);
+       ((u_int16_t *)dest)[1] = CSR_READ_4(sc, SIS_RXFILT_DATA);
+       CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR2);
+       ((u_int16_t *)dest)[2] = CSR_READ_4(sc, SIS_RXFILT_DATA);
+ 
+       CSR_WRITE_4(sc, SIS_RXFILT_CTL, save);
+       CSR_WRITE_4(sc, SIS_CSR, save2);
+       return;
+ }
  #endif
  
  static int sis_miibus_readreg(dev, phy, reg)
***************
*** 889,896 ****
                command = pci_read_config(dev, PCIR_REVID, 1);
                if (command == SIS_REV_630S ||
                    command == SIS_REV_630E ||
!                   command == SIS_REV_630EA1)
                        sis_read_cmos(sc, dev, (caddr_t)&eaddr, 0x9, 6);
                else
  #endif
                        sis_read_eeprom(sc, (caddr_t)&eaddr,
--- 918,929 ----
                command = pci_read_config(dev, PCIR_REVID, 1);
                if (command == SIS_REV_630S ||
                    command == SIS_REV_630E ||
!                   command == SIS_REV_630EA1 ||
!                   command == SIS_REV_630ET)
                        sis_read_cmos(sc, dev, (caddr_t)&eaddr, 0x9, 6);
+ 
+               else if ((command > 0x81) && (command <= 0x90))
+                       sis_read_mac(sc, dev, (caddr_t)&eaddr);
                else
  #endif
                        sis_read_eeprom(sc, (caddr_t)&eaddr,
***************
*** 903,908 ****
--- 936,948 ----
         */
        printf("sis%d: Ethernet address: %6D\n", unit, eaddr, ":");
  
+       /*
+        * From the Linux driver:
+        * 630ET : set the mii access mode as software-mode
+        */
+       if (command == SIS_REV_630ET)
+               SIS_SETBIT(sc, SIS_CSR, SIS_CSR_ACCESS_MODE);
+       
        sc->sis_unit = unit;
        callout_handle_init(&sc->sis_stat_ch);
        bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
Index: if_sisreg.h
===================================================================
RCS file: /cvs/src/sys/pci/if_sisreg.h,v
retrieving revision 1.1.4.6
diff -c -r1.1.4.6 if_sisreg.h
*** if_sisreg.h 8 Dec 2001 00:04:15 -0000       1.1.4.6
--- if_sisreg.h 2 Jan 2002 20:54:06 -0000
***************
*** 105,110 ****
--- 105,112 ----
  #define SIS_CSR_RX_RESET      0x00000020
  #define SIS_CSR_SOFTINTR      0x00000080
  #define SIS_CSR_RESET         0x00000100
+ #define SIS_CSR_ACCESS_MODE   0x00000200
+ #define SIS_CSR_RELOAD                0x00000400
  
  #define SIS_CFG_BIGENDIAN     0x00000001
  #define SIS_CFG_PERR_DETECT   0x00000008
***************
*** 367,372 ****
--- 369,375 ----
  #define SIS_REV_630E          0x0081
  #define SIS_REV_630S          0x0082
  #define SIS_REV_630EA1                0x0083
+ #define SIS_REV_630ET         0x0083
  
  /*
   * NatSemi vendor ID

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