Yesterday I ran into a "problem" with uart(4) on big-endian MIPS
board. uart code treats registers as bytes and reads/writes them using
bus_space_read_1/bus_space_write_1. To handle word-aligned registers we
have regshft in uart_bas structure. It works for little-endian flags
where lowest byte resides at uart_base + (regnum << regshft) address
but for big endian targets actual data resides at
uart_base + ((regnum + 1) << regshft) - 1.One way to solve it is to increase uart_base when setting uart_bas, but it's not obvious and requires knowledge of uart(4) internals. I think better solution would be to take into account endianess when defining uart_regofs. Or if other BE devices have data in highest byte new field should be added to uart_bas (defaulted to 0) Any thoughts? -- gonzo _______________________________________________ [email protected] mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-hackers To unsubscribe, send any mail to "[email protected]"
