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Maintainer: po...@freebsd.org Last committer: m...@freebsd.org Ident: $FreeBSD: head/cad/electric/Makefile 386097 2015-05-11 18:34:57Z mat $ Log URL: http://beefy8.nyi.freebsd.org/data/head-armv6-default/p403218_s291949/logs/electric-7.0.0_4.log Build URL: http://beefy8.nyi.freebsd.org/build.html?mastername=head-armv6-default&build=p403218_s291949 Log: ====>> Building cad/electric build started at Thu Dec 10 13:06:05 UTC 2015 port directory: /usr/ports/cad/electric building for: FreeBSD head-armv6-default-job-20 11.0-CURRENT FreeBSD 11.0-CURRENT r291949 arm maintained by: po...@freebsd.org Makefile ident: $FreeBSD: head/cad/electric/Makefile 386097 2015-05-11 18:34:57Z mat $ Poudriere version: 3.1.10 Host OSVERSION: 1100085 Jail OSVERSION: 1100091 !!! Jail is newer than host. (Jail: 1100091, Host: 1100085) !!! !!! This is not supported. !!! !!! Host kernel must be same or newer than jail. !!! !!! Expect build failures. !!! ---Begin Environment--- SHELL=/bin/csh UNAME_p=armv6 UNAME_m=arm ABI_FILE=/usr/lib/crt1.o OSVERSION=1100091 UNAME_v=FreeBSD 11.0-CURRENT r291949 UNAME_r=11.0-CURRENT BLOCKSIZE=K MAIL=/var/mail/root STATUS=1 SAVED_TERM=screen QEMU_EMULATING=1 MASTERMNT=/usr/local/poudriere/data/.m/head-armv6-default/ref PATH=/sbin:/bin:/usr/sbin:/usr/bin:/usr/local/sbin:/usr/local/bin:/root/bin POUDRIERE_BUILD_TYPE=bulk PKGNAME=electric-7.0.0_4 OLDPWD=/ PWD=/usr/local/poudriere/data/.m/head-armv6-default/ref/.p/pool MASTERNAME=head-armv6-default SCRIPTPREFIX=/usr/local/share/poudriere USER=root HOME=/root POUDRIERE_VERSION=3.1.10 SCRIPTPATH=/usr/local/share/poudriere/bulk.sh LIBEXECPREFIX=/usr/local/libexec/poudriere LOCALBASE=/usr/local PACKAGE_BUILDING=yes ---End Environment--- ---Begin OPTIONS List--- ===> The following configuration options are available for electric-7.0.0_4: NLS=on: Native Language Support OPTIMIZED_CFLAGS=off: Use extra compiler optimizations T1LIB=on: Use T1lib Type1 font library ===> Use 'make config' to modify these settings ---End OPTIONS List--- --CONFIGURE_ARGS-- --x-libraries=/usr/local/lib --x-includes=/usr/local/include --prefix=/usr/local ${_LATE_CONFIGURE_ARGS} --End CONFIGURE_ARGS-- --CONFIGURE_ENV-- XDG_DATA_HOME=/wrkdirs/usr/ports/cad/electric/work XDG_CONFIG_HOME=/wrkdirs/usr/ports/cad/electric/work HOME=/wrkdirs/usr/ports/cad/electric/work TMPDIR="/tmp" SHELL=/bin/sh CONFIG_SHELL=/bin/sh CONFIG_SITE=/usr/ports/Templates/config.site lt_cv_sys_max_cmd_len=262144 --End CONFIGURE_ENV-- --MAKE_ENV-- MOTIFLIB="-L/usr/local/lib -lXm -lXp" XDG_DATA_HOME=/wrkdirs/usr/ports/cad/electric/work XDG_CONFIG_HOME=/wrkdirs/usr/ports/cad/electric/work HOME=/wrkdirs/usr/ports/cad/electric/work TMPDIR="/tmp" NO_PIE=yes SHELL=/bin/sh NO_LINT=YES PREFIX=/usr/local LOCALBASE=/usr/local LIBDIR="/usr/lib" CC="/nxb-bin/usr/bin/cc" CFLAGS="-O2 -pipe -mfloat-abi=softfp -fno-strict-aliasing" CPP="/nxb-bin/usr/bin/cpp" CPPFLAGS="" LDFLAGS="" LIBS="" CXX="/nxb-bin/usr/bin/c++" CXXFLAGS="-O2 -pipe -mfloat-abi=softfp -fno-strict-aliasing " MANPREFIX="/usr/local" BSD_INSTALL_PROGRAM="install -s -m 555" BSD_INSTALL_LIB="install -s -m 444" BSD_INSTALL_SCRIPT="install -m 555" BSD_INSTALL_DATA="install -m 0644" BSD_INSTALL_MAN="install -m 444" --End MAKE_ENV-- --PLIST_SUB-- OSREL=11.0 PREFIX=%D LOCALBASE=/usr/local RESETPREFIX=/usr/local PORTDOCS="" PORTEXAMPLES="" LIB32DIR=lib DOCSDIR="share/doc/electric" EXAMPLESDIR="share/examples/electric" DATADIR="share/electric" WWWDIR="www/electric" ETCDIR="etc/electric" --End PLIST_SUB-- --SUB_LIST-- PREFIX=/usr/local LOCALBASE=/usr/local DATADIR=/usr/local/share/electric DOCSDIR=/usr/local/share/doc/electric EXAMPLESDIR=/usr/local/share/examples/electric WWWDIR=/usr/local/www/electric ETCDIR=/usr/local/etc/electric --End SUB_LIST-- ---Begin make.conf--- CC=/nxb-bin/usr/bin/cc CPP=/nxb-bin/usr/bin/cpp CXX=/nxb-bin/usr/bin/c++ AS=/nxb-bin/usr/bin/as NM=/nxb-bin/usr/bin/nm LD=/nxb-bin/usr/bin/ld OBJCOPY=/nxb-bin/usr/bin/objcopy SIZE=/nxb-bin/usr/bin/size STRIPBIN=/nxb-bin/usr/bin/strip SED=/nxb-bin/usr/bin/sed READELF=/nxb-bin/usr/bin/readelf RANLIB=/nxb-bin/usr/bin/ranlib YACC=/nxb-bin/usr/bin/yacc NM=/nxb-bin/usr/bin/nm MAKE=/nxb-bin/usr/bin/make STRINGS=/nxb-bin/usr/bin/strings AWK=/nxb-bin/usr/bin/awk FLEX=/nxb-bin/usr/bin/flex CC=/nxb-bin/usr/bin/cc CPP=/nxb-bin/usr/bin/cpp CXX=/nxb-bin/usr/bin/c++ AS=/nxb-bin/usr/bin/as NM=/nxb-bin/usr/bin/nm LD=/nxb-bin/usr/bin/ld OBJCOPY=/nxb-bin/usr/bin/objcopy SIZE=/nxb-bin/usr/bin/size STRIPBIN=/nxb-bin/usr/bin/strip SED=/nxb-bin/usr/bin/sed READELF=/nxb-bin/usr/bin/readelf RANLIB=/nxb-bin/usr/bin/ranlib YACC=/nxb-bin/usr/bin/yacc NM=/nxb-bin/usr/bin/nm MAKE=/nxb-bin/usr/bin/make STRINGS=/nxb-bin/usr/bin/strings AWK=/nxb-bin/usr/bin/awk FLEX=/nxb-bin/usr/bin/flex CC=/nxb-bin/usr/bin/cc CPP=/nxb-bin/usr/bin/cpp CXX=/nxb-bin/usr/bin/c++ AS=/nxb-bin/usr/bin/as NM=/nxb-bin/usr/bin/nm LD=/nxb-bin/usr/bin/ld OBJCOPY=/nxb-bin/usr/bin/objcopy SIZE=/nxb-bin/usr/bin/size STRIPBIN=/nxb-bin/usr/bin/strip SED=/nxb-bin/usr/bin/sed READELF=/nxb-bin/usr/bin/readelf RANLIB=/nxb-bin/usr/bin/ranlib YACC=/nxb-bin/usr/bin/yacc NM=/nxb-bin/usr/bin/nm MAKE=/nxb-bin/usr/bin/make STRINGS=/nxb-bin/usr/bin/strings AWK=/nxb-bin/usr/bin/awk FLEX=/nxb-bin/usr/bin/flex CC=/nxb-bin/usr/bin/cc CPP=/nxb-bin/usr/bin/cpp CXX=/nxb-bin/usr/bin/c++ AS=/nxb-bin/usr/bin/as NM=/nxb-bin/usr/bin/nm LD=/nxb-bin/usr/bin/ld OBJCOPY=/nxb-bin/usr/bin/objcopy SIZE=/nxb-bin/usr/bin/size STRIPBIN=/nxb-bin/usr/bin/strip SED=/nxb-bin/usr/bin/sed READELF=/nxb-bin/usr/bin/readelf RANLIB=/nxb-bin/usr/bin/ranlib YACC=/nxb-bin/usr/bin/yacc NM=/nxb-bin/usr/bin/nm MAKE=/nxb-bin/usr/bin/make STRINGS=/nxb-bin/usr/bin/strings AWK=/nxb-bin/usr/bin/awk FLEX=/nxb-bin/usr/bin/flex CC=/nxb-bin/usr/bin/cc CPP=/nxb-bin/usr/bin/cpp CXX=/nxb-bin/usr/bin/c++ AS=/nxb-bin/usr/bin/as NM=/nxb-bin/usr/bin/nm LD=/nxb-bin/usr/bin/ld OBJCOPY=/nxb-bin/usr/bin/objcopy SIZE=/nxb-bin/usr/bin/size STRIPBIN=/nxb-bin/usr/bin/strip SED=/nxb-bin/usr/bin/sed READELF=/nxb-bin/usr/bin/readelf RANLIB=/nxb-bin/usr/bin/ranlib YACC=/nxb-bin/usr/bin/yacc NM=/nxb-bin/usr/bin/nm MAKE=/nxb-bin/usr/bin/make STRINGS=/nxb-bin/usr/bin/strings AWK=/nxb-bin/usr/bin/awk FLEX=/nxb-bin/usr/bin/flex CC=/nxb-bin/usr/bin/cc CPP=/nxb-bin/usr/bin/cpp CXX=/nxb-bin/usr/bin/c++ AS=/nxb-bin/usr/bin/as NM=/nxb-bin/usr/bin/nm LD=/nxb-bin/usr/bin/ld OBJCOPY=/nxb-bin/usr/bin/objcopy SIZE=/nxb-bin/usr/bin/size STRIPBIN=/nxb-bin/usr/bin/strip SED=/nxb-bin/usr/bin/sed READELF=/nxb-bin/usr/bin/readelf RANLIB=/nxb-bin/usr/bin/ranlib YACC=/nxb-bin/usr/bin/yacc <snip> CMPri %R6, 2, pred:14, pred:%noreg, %CPSR<imp-def> Bcc <BB#133>, pred:0, pred:%CPSR<kill> Successors according to CFG: BB#133(16) BB#128(16) BB#128: derived from LLVM BB %if.then.129.i Live Ins: %R6 %R9 %R10 Predecessors according to CFG: BB#127 CMPri %R6<kill>, 1, pred:14, pred:%noreg, %CPSR<imp-def> Bcc <BB#93>, pred:1, pred:%CPSR<kill> Successors according to CFG: BB#129(16) BB#93(16) BB#129: derived from LLVM BB %sw.bb.130.i Live Ins: %R9 %R10 Predecessors according to CFG: BB#128 %R0<def> = LDRi12 <cp#56>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] Successors according to CFG: BB#130 BB#130: derived from LLVM BB %if.end.141.i Live Ins: %D8 %D9 %D10 %D11 %D12 %D13 %D14 %D15 %Q4 %Q5 %Q6 %Q7 %R0 %R9 %R10 %S16 %S17 %S18 %S19 %S20 %S21 %S22 %S23 %S24 %S25 %S26 %S27 %S28 %S29 %S30 %S31 %D6_D8 %D7_D9 %D8_D10 %D9_D11 %D10_D12 %D11_D13 %D12_D14 %D13_D15 %D14_D16 %D15_D17 %Q3_Q4 %Q4_Q5 %Q5_Q6 %Q6_Q7 %Q7_Q8 %Q1_Q2_Q3_Q4 %Q2_Q3_Q4_Q5 %Q3_Q4_Q5_Q6 %Q4_Q5_Q6_Q7 %Q5_Q6_Q7_Q8 %Q6_Q7_Q8_Q9 %Q7_Q8_Q9_Q10 %R0_R1 %R8_R9 %R10_R11 %D6_D7_D8 %D7_D8_D9 %D8_D9_D10 %D9_D10_D11 %D10_D11_D12 %D11_D12_D13 %D12_D13_D14 %D13_D14_D15 %D14_D15_D16 %D15_D16_D17 %D4_D6_D8 %D5_D7_D9 %D6_D8_D10 %D7_D9_D11 %D8_D10_D12 %D9_D11_D13 %D10_D12_D14 %D11_D13_D15 %D12_D14_D16 %D13_D15_D17 %D14_D16_D18 %D15_D17_D19 %D2_D4_D6_D8 %D3_D5_D7_D9 %D4_D6_D8_D10 %D5_D7_D9_D11 %D6_D8_D10_D12 %D7_D9_D11_D13 %D8_D10_D12_D14 %D9_D11_D13_D15 %D10_D12_D14_D16 %D11_D13_D15_D17 %D12_D14_D16_D18 %D13_D15_D17_D19 %D14_D16_D18_D20 %D15_D17_D19_D21 %D7_D8 %D9_D10 %D11_D12 %D13_D14 %D15_D16 %D5_D6_D7_D8 %D7_D8_D9_D10 %D9_D10_D11_D12 %D11_D12_D13_D14 %D13_D14_D15_D16 % D15_D16_D17_D18 %D8 %D9 %D10 %D11 %D12 %D13 %D14 %D15 %Q4 %Q5 %Q6 %Q7 %R0 %R9 %R10 %S16 %S17 %S18 %S19 %S20 %S21 %S22 %S23 %S24 %S25 %S26 %S27 %S28 %S29 %S30 %S31 %D6_D8 %D7_D9 %D8_D10 %D9_D11 %D10_D12 %D11_D13 %D12_D14 %D13_D15 %D14_D16 %D15_D17 %Q3_Q4 %Q4_Q5 %Q5_Q6 %Q6_Q7 %Q7_Q8 %Q1_Q2_Q3_Q4 %Q2_Q3_Q4_Q5 %Q3_Q4_Q5_Q6 %Q4_Q5_Q6_Q7 %Q5_Q6_Q7_Q8 %Q6_Q7_Q8_Q9 %Q7_Q8_Q9_Q10 %R0_R1 %R8_R9 %R10_R11 %D6_D7_D8 %D7_D8_D9 %D8_D9_D10 %D9_D10_D11 %D10_D11_D12 %D11_D12_D13 %D12_D13_D14 %D13_D14_D15 %D14_D15_D16 %D15_D16_D17 %D4_D6_D8 %D5_D7_D9 %D6_D8_D10 %D7_D9_D11 %D8_D10_D12 %D9_D11_D13 %D10_D12_D14 %D11_D13_D15 %D12_D14_D16 %D13_D15_D17 %D14_D16_D18 %D15_D17_D19 %D2_D4_D6_D8 %D3_D5_D7_D9 %D4_D6_D8_D10 %D5_D7_D9_D11 %D6_D8_D10_D12 %D7_D9_D11_D13 %D8_D10_D12_D14 %D9_D11_D13_D15 %D10_D12_D14_D16 %D11_D13_D15_D17 %D12_D14_D16_D18 %D13_D15_D17_D19 %D14_D16_D18_D20 %D15_D17_D19_D21 %D7_D8 %D9_D10 %D11_D12 %D13_D14 %D15_D16 %D5_D6_D7_D8 %D7_D8_D9_D10 %D9_D10_D11_D12 %D11_D12_D13_D14 %D13_D14_D15_D1 6 %D15_D16_D17_D18 %D8 %D9 %D10 %D11 %D12 %D! 13 %D14 %D15 %Q4 %Q5 %Q6 %Q7 %R0 %R9 %R10 %S16 %S17 %S18 %S19 %S20 %S21 %S22 %S23 %S24 %S25 %S26 %S27 %S28 %S29 %S30 %S31 %D6_D8 %D7_D9 %D8_D10 %D9_D11 %D10_D12 %D11_D13 %D12_D14 %D13_D15 %D14_D16 %D15_D17 %Q3_Q4 %Q4_Q5 %Q5_Q6 %Q6_Q7 %Q7_Q8 %Q1_Q2_Q3_Q4 %Q2_Q3_Q4_Q5 %Q3_Q4_Q5_Q6 %Q4_Q5_Q6_Q7 %Q5_Q6_Q7_Q8 %Q6_Q7_Q8_Q9 %Q7_Q8_Q9_Q10 %R0_R1 %R8_R9 %R10_R11 %D6_D7_D8 %D7_D8_D9 %D8_D9_D10 %D9_D10_D11 %D10_D11_D12 %D11_D12_D13 %D12_D13_D14 %D13_D14_D15 %D14_D15_D16 %D15_D16_D17 %D4_D6_D8 %D5_D7_D9 %D6_D8_D10 %D7_D9_D11 %D8_D10_D12 %D9_D11_D13 %D10_D12_D14 %D11_D13_D15 %D12_D14_D16 %D13_D15_D17 %D14_D16_D18 %D15_D17_D19 %D2_D4_D6_D8 %D3_D5_D7_D9 %D4_D6_D8_D10 %D5_D7_D9_D11 %D6_D8_D10_D12 %D7_D9_D11_D13 %D8_D10_D12_D14 %D9_D11_D13_D15 %D10_D12_D14_D16 %D11_D13_D15_D17 %D12_D14_D16_D18 %D13_D15_D17_D19 %D14_D16_D18_D20 %D15_D17_D19_D21 %D7_D8 %D9_D10 %D11_D12 %D13_D14 %D15_D16 %D5_D6_D7_D8 %D7_D8_D9_D10 %D9_D10_D11_D12 %D11_D12_D13_D14 %D13_D14_D15_D16 %D15_D16_D17_D18 Predecessors according to CFG: BB#129 BB#134 BB#133 %R1<def> = LDRi12 <cp#17>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] %R2<def> = RSBri %R10<kill>, 0, pred:14, pred:%noreg, opt:%noreg %R3<def> = RSBri %R9<kill>, 0, pred:14, pred:%noreg, opt:%noreg BL_pred <ga:@io_pswrite>, pred:14, pred:%noreg, <regmask>, %LR<imp-def,dead>, %SP<imp-use>, %R0<imp-use>, %R1<imp-use>, %R2<imp-use>, %R3<imp-use>, %SP<imp-def> B <BB#93> Successors according to CFG: BB#93 BB#131: derived from LLVM BB %if.then.i.235.i Live Ins: %R4 %R5 %R6 %R7 %R8 %R9 %R10 Predecessors according to CFG: BB#123 BB#124 %R0<def> = MOVr %R4, pred:14, pred:%noreg, opt:%noreg BL_pred <ga:@io_pswrite>, pred:14, pred:%noreg, <regmask>, %LR<imp-def,dead>, %SP<imp-use>, %R0<imp-use>, %SP<imp-def> %R1<def> = LDRBi12 %R8, 0, pred:14, pred:%noreg; mem:LD1[%str.addr.0.i.232.i] Successors according to CFG: BB#132 BB#132: derived from LLVM BB %if.end.i.238.i Live Ins: %R1 %R4 %R5 %R6 %R7 %R8 %R9 %R10 Predecessors according to CFG: BB#125 BB#131 %R0<def> = MOVr %R5, pred:14, pred:%noreg, opt:%noreg BL_pred <ga:@io_pswrite>, pred:14, pred:%noreg, <regmask>, %LR<imp-def,dead>, %SP<imp-use>, %R0<imp-use>, %R1<imp-use>, %SP<imp-def> %R8<def> = ADDri %R8<kill>, 1, pred:14, pred:%noreg, opt:%noreg B <BB#123> Successors according to CFG: BB#123 BB#133: derived from LLVM BB %sw.bb.133.i Live Ins: %R9 %R10 Predecessors according to CFG: BB#127 %R0<def> = LDRi12 <cp#55>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] B <BB#130> Successors according to CFG: BB#130 BB#134: derived from LLVM BB %sw.bb.136.i Live Ins: %R9 %R10 Predecessors according to CFG: BB#126 %R0<def> = LDRi12 <cp#54>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] B <BB#130> Successors according to CFG: BB#130 BB#135: derived from LLVM BB %if.end.141.critedge.i Live Ins: %R2 %R7 %R8 %R9 %R10 Predecessors according to CFG: BB#107 %R0<def> = LDRi12 <cp#48>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] %R1<def> = LDRi12 <cp#17>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] %R3<def> = ADDrr %R2<kill>, %R9<kill>, pred:14, pred:%noreg, opt:%noreg %R2<def> = MOVr %R10<kill>, pred:14, pred:%noreg, opt:%noreg BL_pred <ga:@io_pswrite>, pred:14, pred:%noreg, <regmask>, %LR<imp-def,dead>, %SP<imp-use>, %R0<imp-use>, %R1<imp-use>, %R2<imp-use>, %R3<imp-use>, %SP<imp-def> %R0<def> = LDRi12 <cp#42>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] BL_pred <ga:@io_pswrite>, pred:14, pred:%noreg, <regmask>, %LR<imp-def,dead>, %SP<imp-use>, %R0<imp-use>, %SP<imp-def> %R4<def> = LDRi12 <cp#43>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] %R5<def> = LDRi12 <cp#46>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] %R6<def> = LDRi12 %SP, 68, pred:14, pred:%noreg; mem:LD4[FixedStack10] Successors according to CFG: BB#136 BB#136: derived from LLVM BB %for.cond.i.241.i Live Ins: %R4 %R5 %R6 %R7 %R8 Predecessors according to CFG: BB#135 BB#141 %R1<def> = LDRBi12 %R8, 0, pred:14, pred:%noreg; mem:LD1[%str.addr.0.i.240.i] %R0<def> = SUBri %R1, 40, pred:14, pred:%noreg, opt:%noreg %R0<def> = UXTB %R0<kill>, 0, pred:14, pred:%noreg CMPri %R0<kill>, 2, pred:14, pred:%noreg, %CPSR<imp-def> Bcc <BB#140>, pred:3, pred:%CPSR<kill> Successors according to CFG: BB#140(62) BB#137(35) BB#137: derived from LLVM BB %for.cond.i.241.i Live Ins: %R1 %R4 %R5 %R6 %R7 %R8 Predecessors according to CFG: BB#136 CMPri %R1, 92, pred:14, pred:%noreg, %CPSR<imp-def> Bcc <BB#140>, pred:0, pred:%CPSR<kill> Successors according to CFG: BB#140(31) BB#138(4) BB#138: derived from LLVM BB %for.cond.i.241.i Live Ins: %R1 %R4 %R5 %R6 %R7 %R8 Predecessors according to CFG: BB#137 CMPri %R1, 0, pred:14, pred:%noreg, %CPSR<imp-def> Bcc <BB#141>, pred:1, pred:%CPSR<kill> Successors according to CFG: BB#139(4) BB#141(31) BB#139: derived from LLVM BB %io_pswritestring.exit247.i Live Ins: %R6 %R7 Predecessors according to CFG: BB#138 %R0<def> = LDRi12 <cp#44>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] BL_pred <ga:@io_pswrite>, pred:14, pred:%noreg, <regmask>, %LR<imp-def,dead>, %SP<imp-use>, %R0<imp-use>, %SP<imp-def> %R0<def> = LDRi12 <cp#49>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] %R1<def> = MOVr %R6<kill>, pred:14, pred:%noreg, opt:%noreg %R2<def> = MOVr %R7<kill>, pred:14, pred:%noreg, opt:%noreg BL_pred <ga:@io_pswrite>, pred:14, pred:%noreg, <regmask>, %LR<imp-def,dead>, %SP<imp-use>, %R0<imp-use>, %R1<imp-use>, %R2<imp-use>, %SP<imp-def> B <BB#93> Successors according to CFG: BB#93 BB#140: derived from LLVM BB %if.then.i.243.i Live Ins: %R4 %R5 %R6 %R7 %R8 Predecessors according to CFG: BB#136 BB#137 %R0<def> = MOVr %R4, pred:14, pred:%noreg, opt:%noreg BL_pred <ga:@io_pswrite>, pred:14, pred:%noreg, <regmask>, %LR<imp-def,dead>, %SP<imp-use>, %R0<imp-use>, %SP<imp-def> %R1<def> = LDRBi12 %R8, 0, pred:14, pred:%noreg; mem:LD1[%str.addr.0.i.240.i] Successors according to CFG: BB#141 BB#141: derived from LLVM BB %if.end.i.246.i Live Ins: %R1 %R4 %R5 %R6 %R7 %R8 Predecessors according to CFG: BB#138 BB#140 %R0<def> = MOVr %R5, pred:14, pred:%noreg, opt:%noreg BL_pred <ga:@io_pswrite>, pred:14, pred:%noreg, <regmask>, %LR<imp-def,dead>, %SP<imp-use>, %R0<imp-use>, %R1<imp-use>, %SP<imp-def> %R8<def> = ADDri %R8<kill>, 1, pred:14, pred:%noreg, opt:%noreg B <BB#136> Successors according to CFG: BB#136 BB#142: derived from LLVM BB %if.then.119 Predecessors according to CFG: BB#44 %R3<def> = LDRi12 %SP, 112, pred:14, pred:%noreg; mem:LD4[%yh] %R1<def> = LDRi12 %SP, 116, pred:14, pred:%noreg; mem:LD4[%yl] %R0<def> = LDRi12 %SP, 124, pred:14, pred:%noreg; mem:LD4[%xl] %R4<def> = MOVi 0, pred:14, pred:%noreg, opt:%noreg STRi12 %R4, %SP, 0, pred:14, pred:%noreg; mem:ST4[Stack] %R2<def> = MOVr %R0, pred:14, pred:%noreg, opt:%noreg BL_pred <ga:@_ZL9io_pslinelllll>, pred:14, pred:%noreg, <regmask>, %LR<imp-def,dead>, %SP<imp-use>, %R0<imp-use>, %R1<imp-use>, %R2<imp-use>, %R3<imp-use>, %SP<imp-def> %R2<def> = LDRi12 %SP, 120, pred:14, pred:%noreg; mem:LD4[%xh] %R1<def> = LDRi12 %SP, 112, pred:14, pred:%noreg; mem:LD4[%yh] %R0<def> = LDRi12 %SP, 124, pred:14, pred:%noreg; mem:LD4[%xl] STRi12 %R4, %SP, 0, pred:14, pred:%noreg; mem:ST4[Stack] %R3<def> = MOVr %R1, pred:14, pred:%noreg, opt:%noreg BL_pred <ga:@_ZL9io_pslinelllll>, pred:14, pred:%noreg, <regmask>, %LR<imp-def,dead>, %SP<imp-use>, %R0<imp-use>, %R1<imp-use>, %R2<imp-use>, %R3<imp-use>, %SP<imp-def> %R3<def> = LDRi12 %SP, 116, pred:14, pred:%noreg; mem:LD4[%yl] %R1<def> = LDRi12 %SP, 112, pred:14, pred:%noreg; mem:LD4[%yh] %R0<def> = LDRi12 %SP, 120, pred:14, pred:%noreg; mem:LD4[%xh] STRi12 %R4, %SP, 0, pred:14, pred:%noreg; mem:ST4[Stack] %R2<def> = MOVr %R0, pred:14, pred:%noreg, opt:%noreg BL_pred <ga:@_ZL9io_pslinelllll>, pred:14, pred:%noreg, <regmask>, %LR<imp-def,dead>, %SP<imp-use>, %R0<imp-use>, %R1<imp-use>, %R2<imp-use>, %R3<imp-use>, %SP<imp-def> %R2<def> = LDRi12 %SP, 124, pred:14, pred:%noreg; mem:LD4[%xl] %R1<def> = LDRi12 %SP, 116, pred:14, pred:%noreg; mem:LD4[%yl] %R0<def> = LDRi12 %SP, 120, pred:14, pred:%noreg; mem:LD4[%xh] STRi12 %R4<kill>, %SP, 0, pred:14, pred:%noreg; mem:ST4[Stack] %R3<def> = MOVr %R1, pred:14, pred:%noreg, opt:%noreg B <BB#145> Successors according to CFG: BB#145 BB#143: derived from LLVM BB %for.inc.i Live Ins: %R0 %R2 %R3 %R4 %R5 %R6 %R7 %R8 %R9 Predecessors according to CFG: BB#61 BB#62 %R0<def> = ADDri %R0<kill>, 1, pred:14, pred:%noreg, opt:%noreg B <BB#61> Successors according to CFG: BB#61 BB#144: derived from LLVM BB %if.then.36.i Live Ins: %R4 %R5 %R6 %R7 %R8 %R9 Predecessors according to CFG: BB#73 %R0<def> = MOVr %R6, pred:14, pred:%noreg, opt:%noreg %R1<def> = MOVi 45, pred:14, pred:%noreg, opt:%noreg B <BB#76> Successors according to CFG: BB#76 # End machine code for function _ZL9io_pspolyP8IpolygonP11Iwindowpart. *** Bad machine code: Using an undefined physical register *** - function: _ZL9io_pspolyP8IpolygonP11Iwindowpart - basic block: BB#38 if.end.82 (0x8039c99a0) - instruction: STMIA- operand 5: %R6 fatal error: error in backend: Found 1 machine code errors. c++: error: clang frontend command failed with exit code 70 (use -v to see invocation) FreeBSD clang version 3.7.0 (tags/RELEASE_370/final 246257) 20150906 Target: armv6--freebsd11.0-gnueabi Thread model: posix c++: note: diagnostic msg: PLEASE submit a bug report to https://bugs.freebsd.org/submit/ and include the crash backtrace, preprocessed source, and associated run script. c++: note: diagnostic msg: ******************** PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT: Preprocessed source(s) and associated run script(s) are located at: c++: note: diagnostic msg: /tmp/iopsout-b6d40d.cpp c++: note: diagnostic msg: /tmp/iopsout-b6d40d.sh c++: note: diagnostic msg: ******************** *** Error code 70 Stop. make[1]: stopped in /wrkdirs/usr/ports/cad/electric/work/electric-7.00 *** Error code 1 Stop. make: stopped in /usr/ports/cad/electric _______________________________________________ freebsd-pkg-fallout@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/freebsd-pkg-fallout To unsubscribe, send any mail to "freebsd-pkg-fallout-unsubscr...@freebsd.org"
