--- Comment #4 from ---
A commit references this bug:

Author: dim
Date: Sat Apr 14 12:07:07 UTC 2018
New revision: 332501

  Pull in r325446 from upstream clang trunk (by me):

    [X86] Add 'sahf' CPU feature to frontend

    Make clang accept `-msahf` (and `-mno-sahf`) flags to activate the
    `+sahf` feature for the backend, for bug 36028 (Incorrect use of
    pushf/popf enables/disables interrupts on amd64 kernels).  This was
    originally submitted in bug 36037 by Jonathan Looney

    As described there, GCC also uses `-msahf` for this feature, and the
    backend already recognizes the `+sahf` feature. All that is needed is
    to teach clang to pass this on to the backend.

    The mapping of feature support onto CPUs may not be complete; rather,
    it was chosen to match LLVM's idea of which CPUs support this feature
    (see lib/Target/X86/

    I also updated the affected test case (CodeGen/attr-target-x86.c) to
    match the emitted output.

    Reviewers: craig.topper, coby, efriedma, rsmith

    Reviewed By: craig.topper

    Subscribers: emaste, cfe-commits

    Differential Revision:

  Pull in r328944 from upstream llvm trunk (by Chandler Carruth):

    [x86] Expose more of the condition conversion routines in the public
    API for X86's instruction information. I've now got a second patch
    under review that needs these same APIs. This bit is nicely
    orthogonal and obvious, so landing it. NFC.

  Pull in r329414 from upstream llvm trunk (by Craig Topper):

    [X86] Merge itineraries for CLC, CMC, and STC.

    These are very simple flag setting instructions that appear to only
    be a single uop. They're unlikely to need this separation.

  Pull in r329657 from upstream llvm trunk (by Chandler Carruth):

    [x86] Introduce a pass to begin more systematically fixing PR36028
    and similar issues.

    The key idea is to lower COPY nodes populating EFLAGS by scanning the
    uses of EFLAGS and introducing dedicated code to preserve the
    necessary state in a GPR. In the vast majority of cases, these uses
    are cmovCC and jCC instructions. For such cases, we can very easily
    save and restore the necessary information by simply inserting a
    setCC into a GPR where the original flags are live, and then testing
    that GPR directly to feed the cmov or conditional branch.

    However, things are a bit more tricky if arithmetic is using the
    flags.  This patch handles the vast majority of cases that seem to
    come up in practice: adc, adcx, adox, rcl, and rcr; all without
    taking advantage of partially preserved EFLAGS as LLVM doesn't
    currently model that at all.

    There are a large number of operations that techinaclly observe
    EFLAGS currently but shouldn't in this case -- they typically are
    using DF.  Currently, they will not be handled by this approach.
    However, I have never seen this issue come up in practice. It is
    already pretty rare to have these patterns come up in practical code
    with LLVM. I had to resort to writing MIR tests to cover most of the
    logic in this pass already.  I suspect even with its current amount
    of coverage of arithmetic users of EFLAGS it will be a significant
    improvement over the current use of pushf/popf. It will also produce
    substantially faster code in most of the common patterns.

    This patch also removes all of the old lowering for EFLAGS copies,
    and the hack that forced us to use a frame pointer when EFLAGS copies
    were found anywhere in a function so that the dynamic stack
    adjustment wasn't a problem. None of this is needed as we now lower
    all of these copies directly in MI and without require stack

    Lots of thanks to Reid who came up with several aspects of this
    approach, and Craig who helped me work out a couple of things
    tripping me up while working on this.

    Differential Revision:

  Pull in r329673 from upstream llvm trunk (by Chandler Carruth):

    [x86] Model the direction flag (DF) separately from the rest of

    This cleans up a number of operations that only claimed te use EFLAGS
    due to using DF. But no instructions which we think of us setting
    EFLAGS actually modify DF (other than things like popf) and so this
    needlessly creates uses of EFLAGS that aren't really there.

    In fact, DF is so restrictive it is pretty easy to model. Only STD,
    CLD, and the whole-flags writes (WRFLAGS and POPF) need to model

    I've also somewhat cleaned up some of the flag management instruction
    definitions to be in the correct .td file.

    Adding this extra register also uncovered a failure to use the
    correct datatype to hold X86 registers, and I've corrected that as
    necessary here.

    Differential Revision:

  Together, these should ensure clang does not use pushf/popf sequences to
  save and restore flags, avoiding problems with unrelated flags (such as
  the interrupt flag) being restored unexpectedly.

  Requested by: jtl
  PR:           225330
  MFC after:    1 week


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