On Monday, February 09, 2015 10:26:42 PM Hans Petter Selasky wrote:
> Hi John,
> Do all PCI busses support 64-bit DMA busmaster? Do we reflect this in
> the busdma tags passed down to device drivers?
Yes, barring weird quirks. Even pre-PCI-e had a way to support 64-bit
addresses for cards on a 32-bit bus using dual address cycles. Gary, do you
only have problems with xhci and not other PCI devices in your system?
> On 02/09/15 18:36, Gary Jennejohn wrote:
> > r276717 breaks access to my 4-disk external USB3 (XHCI) enclosure.
> > The symptom is that only the first of the threee disks is found.
> > r276716 sees all the disks immediately.
> > This is the output for the bridge chip:
> > umass0: <JMicron USB to ATAATAPI Bridge, class 0/0, rev 3.00/28.03, addr
> > 2> on usbus0
> > The problem seems to be mainly due to setting dma_bits to 64. It's
> > true that the chip on the controller board supports 64 bit DMA, but the
> > JMicron seems to have a real crisis when that setting is used, although
> > I don't know why.
> > Note that the nice output above was obtained after hard coding dma_bits
> > to 32 in xhci_init(). With 64 bits I see this:
> > umass0: <vendor 0x152d product 0x0539, class 0/0, rev 3.00/28.03, addr 3>
> > on usbus0
> > probably because reading the strings from the device fails.
> > Anyway, it would be nice to have a sysctl to force dma_bits to 32.
> > Unfortunately, I still have a problem with my enclosure with more
> > current versions of HEAD. The rather questionable practice of
> > always doing a multi LUN enquiry using the SCSI-3 CDB byte 0xa0
> > also causes problems. Considering that most of these bridge
> > chips can barely emulate SCSI-2 it seems rather foolish to try to
> > jam SCSI-3 CDB bytes down their throats.
> > But that's a different story.
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