This patch extends the local APIC emulation a bit by adding the following 
- Add an ioctl and a bhyvectl command to trigger local interrupts on a
  local APIC.  The "fixed" and "NMI" delivery modes are enabled.
- Add support for the CMCI LVT entry.
- Add the ability to report local APIC errors and trigger errors for
  invalid vectors when sending IPIs or firing an external interrupt that
  references an invalid IDT vector.
- Silently force all reserved fields in LVT entries to zero when they
  are written (removes the need for clearing those bits when triggering
  an LVT interrupt).
- Add entries to the MP Table and MADT to advertise the typical x86 LINT
  configuration (ExtINT on LINT0 and NMI on LINT1).
- Add a bhyvectl command to inject an NMI on an arbitrary CPU (this latter
  should probably be a separate patch)

In particular, while bhyectl --inject-nmi can inject an NMI on a single vcpu,
the more traditional way of signalling a system-wide error (such as SERR#
or PERR#) is to assert the LINT1 pins on all CPUs.  This can now be done via
'bhyectl --vm=foo --cpu=-1 --assert-lapic-lvt=1' (cpu of -1 is a broadcast
to all CPUs for the LVT ioctl).  The patch is at  I'm certainly open to 
suggestions on ways to make this be more consistent with the style/design/flow
of the existing code.

(I started on this because I want to add support for machine check injection 
so I can use bhyve to test the machine check code, but for that I wanted CMCI 
support and it kind of snowballed from there)

John Baldwin
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