.. so apparently half/quarter rate works on 4.9GHz channels on my
AR9280 NICs. :-)

It's totally odd to watch work.

Just for the record, this half/quarter rate support is for GSM and PSB
11abg; it doesn't yet remotely look like it'll support 11n TX
aggregation. There's a bunch of work that needs to happen with the
driver and net80211 layer before we can treat half/quarter as a
channel flag rather than an operational mode.

There's a _lot_ of stuff to hack on here which is totally manageable
without needing to know all the complicated, underlying stuff.
This includes all the related stuff for long distance link support
(which requires tweaking slot timing, ACK/CTS timing, etc.)

Let me know if you'd like a mini-project to hack on.


---------- Forwarded message ----------
From: Adrian Chadd <adr...@freebsd.org>
Date: 13 September 2012 00:24
Subject: svn commit: r240448 - head/sys/dev/ath/ath_hal/ar5416
To: src-committ...@freebsd.org, svn-src-...@freebsd.org,

Author: adrian
Date: Thu Sep 13 07:24:14 2012
New Revision: 240448
URL: http://svn.freebsd.org/changeset/base/240448

  Flip on half/quarter rate support.

  No, this isn't HT/5 and HT/10 support.  This is the 11a half/quarter
  rate support primarily used by the 4.9GHz and GSM band regulatory

  This is definitely a work in progress.


  * everything in the last commit;
  * lots more interoperability testing with the AR5212 half/quarter rate
    support for the relevant chips;
  * Do some interop testing on half/quarter rate support between _all_
    the 11n chips - AR5416, AR9160, AR9280 (and AR9285/AR9287 when 2GHz
    half/quarter rate support is coded up.)


Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
--- head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c     Thu Sep 13
07:22:40 2012        (r240447)
+++ head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c     Thu Sep 13
07:24:14 2012        (r240448)
@@ -911,9 +911,9 @@ ar5416FillCapabilityInfo(struct ath_hal
                pCap->halKeyCacheSize = AR5416_KEYTABLE_SIZE;

-       /* XXX not needed */
-       pCap->halChanHalfRate = AH_FALSE;       /* XXX ? */
-       pCap->halChanQuarterRate = AH_FALSE;    /* XXX ? */
+       /* XXX Which chips? */
+       pCap->halChanHalfRate = AH_TRUE;
+       pCap->halChanQuarterRate = AH_TRUE;

        pCap->halTstampPrecision = 32;
        pCap->halHwPhyCounterSupport = AH_TRUE;
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