sorry for the cross-posting.

So, the basic wifi bits are now probing, attaching and (for some
values of work) working. There's still stuck beacons at interface up
time that I need to diagnose in case I really am gating the beacon
queue incorrectly.

But, boards like the D-Link DIR-825 rev C1 which have an AR9344 and an
external AR9380 should now work.

I'll sort out USB tomorrow, then I'll move onto the external switch
support and audio support.

Please let me know if you have further success with any AR9344 boards.
There's a lot of cheap AR934x stuff out there now which has 128MByte
or more RAM. (I think the SoC supports up to 256MByte of physical


---------- Forwarded message ----------
From: Adrian Chadd <>
Date: 13 February 2014 21:25
Subject: svn commit: r261871 - head/sys/mips/conf

Author: adrian
Date: Fri Feb 14 05:25:15 2014
New Revision: 261871

  Enable use of the PCIe connected wifi on the DB120 (AR9344) board.

  The on-board NIC is an 3x3 AR9380 with 5GHz only.

  * enable pci code in AR9344_BASE
  * enable ath_pci and the firmware loading bits in DB120
  * add in the relevant hints in DB120.hints to inform the probe/attach
    code where the PCIe fixup data is for the onboard chip.

  This is only relevant for a default development board.  I also have a
  DB120 with the on-board PCIe wifi NIC disabled and it's exposed as
  a real PCIe slot (to put normal PCIe NICs in); the fixup code will need
  to be disabled to make this work correctly.


  * DB120


Modified: head/sys/mips/conf/AR934X_BASE
--- head/sys/mips/conf/AR934X_BASE      Fri Feb 14 05:22:28 2014
+++ head/sys/mips/conf/AR934X_BASE      Fri Feb 14 05:25:15 2014
@@ -102,6 +102,9 @@ options             USB_DEBUG
 options                USB_HOST_ALIGN=32               # AR71XX (MIPS
in general?) requires this
 device         ehci

+device         pci
+device         ar724x_pci
 device         scbus
 device         umass
 device         da

Modified: head/sys/mips/conf/AR934X_BASE.hints
--- head/sys/mips/conf/AR934X_BASE.hints        Fri Feb 14 05:22:28
2014        (r261870)
+++ head/sys/mips/conf/AR934X_BASE.hints        Fri Feb 14 05:25:15
2014        (r261871)
@@ -22,6 +22,10 @@ hint.ehci.0.maddr=0x1b000100

+# pci"nexus0"

Modified: head/sys/mips/conf/DB120
--- head/sys/mips/conf/DB120    Fri Feb 14 05:22:28 2014        (r261870)
+++ head/sys/mips/conf/DB120    Fri Feb 14 05:25:15 2014        (r261871)
@@ -42,5 +42,11 @@ options      GEOM_UNCOMPRESS
 # Used for the static uboot partition map
 device          geom_map

+# yes, this board has a PCI connected atheros device
+device         ath_pci
+options                AR71XX_ATH_EEPROM
+device         firmware                # Used by the above
+options                ATH_EEPROM_FIRMWARE
 # Boot off of the rootfs, as defined in the geom_map setup.
 options                ROOTDEVNAME=\"ufs:map/rootfs.uncompress\"

Modified: head/sys/mips/conf/DB120.hints
--- head/sys/mips/conf/DB120.hints      Fri Feb 14 05:22:28 2014
+++ head/sys/mips/conf/DB120.hints      Fri Feb 14 05:25:15 2014
@@ -60,6 +60,13 @@ hint.ath.0.eepromsize=16384
 # host registers on the NIC) and then we teach ath where
 # to find it.

+# ath1 hint - pcie slot 0
+# ath0 - eeprom comes from here
 # flash layout:
 # bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2
_______________________________________________ mailing list
To unsubscribe, send any mail to ""

Reply via email to