MSM Display controller includes RSC (Resource Coordinator)
HW block which can control DPU power resources without
DPU driver intervention.
Removing DPU RSC device/driver support till the RSC
dependencies make their way upstream.

Signed-off-by: Rajesh Yadav <rya...@codeaurora.org>
---
 .../devicetree/bindings/display/msm/dpu-rsc.txt    | 96 ----------------------
 1 file changed, 96 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/display/msm/dpu-rsc.txt

diff --git a/Documentation/devicetree/bindings/display/msm/dpu-rsc.txt 
b/Documentation/devicetree/bindings/display/msm/dpu-rsc.txt
deleted file mode 100644
index f5fbcda..0000000
--- a/Documentation/devicetree/bindings/display/msm/dpu-rsc.txt
+++ /dev/null
@@ -1,96 +0,0 @@
-Qualcomm Technologies, Inc. DPU RSC
-
-Snapdragon Display Engine implements display rsc to driver
-display core to different modes for power saving
-
-Required properties
-- compatible:                  Must be "qcom,dpu-rsc"
-- reg:                         Offset and length of the register set for
-                               the device.
-- reg-names:                   Names to refer to register sets related
-                               to this device
-
-Optional properties:
-- clocks:                      List of phandles for clock device nodes
-                               needed by the device.
-- clock-names:                 List of clock names needed by the device.
-- vdd-supply:                  phandle for vdd regulator device node.
-- qcom,dpu-rsc-version:                U32 property represents the rsc 
version. It helps to
-                               select correct sequence for dpu rsc based on 
version.
-- qcom,dpu-dram-channels:      U32 property represents the number of channels 
in the
-                               Bus memory controller.
-- qcom,dpu-num-nrt-paths:      U32 property represents the number of 
non-realtime
-                               paths in each Bus Scaling Usecase. This value 
depends on
-                               number of AXI ports that are dedicated to 
non-realtime VBIF
-                               for particular chipset.
-                               These paths must be defined after rt-paths in
-                               "qcom,msm-bus,vectors-KBps" vector request.
-
-Bus Scaling Subnodes:
-- qcom,dpu-data-bus:           Property to provide Bus scaling for data bus 
access for
-                               dpu blocks.
-- qcom,dpu-llcc-bus:           Property to provide Bus scaling for data bus 
access for
-                               mnoc to llcc.
-- qcom,dpu-ebi-bus:            Property to provide Bus scaling for data bus 
access for
-                               llcc to ebi.
-
-Bus Scaling Data:
-- qcom,msm-bus,name:           String property describing client name.
-- qcom,msm-bus,active-only:    Boolean context flag for requests in active or
-                               dual (active & sleep) contex
-- qcom,msm-bus,num-cases:      This is the number of Bus Scaling use cases
-                               defined in the vectors property.
-- qcom,msm-bus,num-paths:      This represents the number of paths in each
-                               Bus Scaling Usecase.
-- qcom,msm-bus,vectors-KBps:   * A series of 4 cell properties, with a format
-                               of (src, dst, ab, ib) which is defined at
-                               
Documentation/devicetree/bindings/arm/msm/msm_bus.txt
-                               * Current values of src & dst are defined at
-                               include/linux/msm-bus-board.h
-Example:
-       dpu_rscc {
-               cell-index = <0>;
-               compatible = "qcom,dpu-rsc";
-               reg = <0xaf20000 0x1c44>,
-                       <0xaf30000 0x3fd4>;
-               reg-names = "drv", "wrapper";
-               clocks = <&clock_mmss clk_mdss_ahb_clk>,
-                       <&clock_mmss clk_mdss_axi_clk>;
-               clock-names = "iface_clk", "bus_clk";
-               vdd-supply = <&gdsc_mdss>;
-
-               qcom,dpu-rsc-version = <1>;
-               qcom,dpu-dram-channels = <2>;
-               qcom,dpu-num-nrt-paths = <1>;
-
-               qcom,dpu-data-bus {
-                     qcom,msm-bus,name = "dpu_rsc";
-                     qcom,msm-bus,active-only;
-                     qcom,msm-bus,num-cases = <3>;
-                     qcom,msm-bus,num-paths = <2>;
-                     qcom,msm-bus,vectors-KBps =
-                         <22 512 0 0>, <23 512 0 0>,
-                         <22 512 0 6400000>, <23 512 0 6400000>,
-                         <22 512 0 6400000>, <23 512 0 6400000>;
-               };
-               qcom,dpu-llcc-bus {
-                       qcom,msm-bus,name = "dpu_rsc_llcc";
-                       qcom,msm-bus,active-only;
-                       qcom,msm-bus,num-cases = <3>;
-                       qcom,msm-bus,num-paths = <1>;
-                       qcom,msm-bus,vectors-KBps =
-                           <20001 20513 0 0>,
-                           <20001 20513 0 6400000>,
-                           <20001 20513 0 6400000>;
-               };
-               qcom,dpu-ebi-bus {
-                       qcom,msm-bus,name = "dpu_rsc_ebi";
-                       qcom,msm-bus,active-only;
-                       qcom,msm-bus,num-cases = <3>;
-                       qcom,msm-bus,num-paths = <1>;
-                       qcom,msm-bus,vectors-KBps =
-                           <20000 20512 0 0>,
-                           <20000 20512 0 6400000>,
-                           <20000 20512 0 6400000>;
-               };
-       };
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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