On Thu, Jul 12, 2018 at 12:59:27PM -0600, Jordan Crouse wrote:
> Convert the format of the 'show' debugfs file and the crash
> dump to a format resembling YAML. This should be easier to
> parse and be more flexible for future changes and expansions.
>
> Signed-off-by: Jordan Crouse <jcro...@codeaurora.org>
> ---
> Documentation/gpu/drm-msm-crash-dump.txt | 46 ++++++++++++++++++++++++
.rst would be nice, plus including it some msm.rst overview file like we
have for other drivers. For drivers we also tend to omit the drm prefix in
the documentation.
-Daniel
> drivers/gpu/drm/msm/adreno/adreno_gpu.c | 20 ++++++-----
> 2 files changed, 58 insertions(+), 8 deletions(-)
> create mode 100644 Documentation/gpu/drm-msm-crash-dump.txt
>
> diff --git a/Documentation/gpu/drm-msm-crash-dump.txt
> b/Documentation/gpu/drm-msm-crash-dump.txt
> new file mode 100644
> index 000000000000..930e4c970a62
> --- /dev/null
> +++ b/Documentation/gpu/drm-msm-crash-dump.txt
> @@ -0,0 +1,46 @@
> +# drm/msm GPU crash dump format
> +#
> +# This is a description of the format of the drm/msm GPU crash dump format
> that
> +# can be read from /sys/kernel/dri/X/show or from devcoredump following a GPU
> +# hang or fault
> +
> +---
> +kernel: # [string] The kernel version as printed by UTS_RELEASE
> +module: # [string] The module that generated the crash dump
> +time: # [seconds.microseconds] The kernel time at crash
> +comm: # [string] comm string for the binary that generated
> the fault
> + # (if known)
> +cmdline: # [string] the cmdline for the binary that generated the fault
> + # (if known)
> +revision: # [ id core.major.minor.patchlevel] The GPU id followed by the
> + # individual components of the id separated by dots
> +rbbm-status: # [hex] The current value of RBBM_STATUS which shows what GPU
> + # components were in use at the time of the crash
> +ringbuffer: # Ringbuffer data. There will be a sequence for each ringbuffer
> + -id: # [decimal] Ringbuffer identifier (0 based
> index)
> + last-fence: # [decimal] The last fence issued on the ring
> + retired-fence: # [decimal] THe last fence retired on the ring
> + rptr: # [decimal] The current read pointer (rptr) for the ring
> + wptr: # [decimal] The current write pointer (wptr) for the
> + # ring
> + size: # [decimal] The maximum size of the ring programmed in
> + # the hardware
> + data: # [ascii85] The contents of the ring encoded as ascii85.
> + # Only the unused portions of the ring will be printed
> + # (up to a maximum of 'size' bytes)
> +bos: # List of buffers from the hanging submission (if known)
> + -iova: # [hex] GPU address of the buffer
> + size: # [decimal] Size of the buffer (in bytes)
> + data: # [ascii85] The contents of the buffer encoded as
> + # ascii85. Only the contents of buffers marked as
> + # readable are dumped. Trailing zeros at the end of the
> + # buffer won't be dumped.
> +registers: # Sets of register values. This section can be used multiple
> + # times for different ranges of registers. Each register will be
> + # on its own line.
> + - [offset, value] # offset: [hex] byte offset of the register
> + # value: [hex] value of the register
> +
> +registers-hlsq: # (5xx only) Same format as registers. Register data that
> + # only accessible from the HLSQ aperture captured by the
> + # HW based crashdumper
> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> index 163542487e2c..15fe0d029ba6 100644
> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> @@ -444,23 +444,27 @@ void adreno_show(struct msm_gpu *gpu, struct
> msm_gpu_state *state,
> if (IS_ERR_OR_NULL(state))
> return;
>
> - drm_printf(p, "status: %08x\n", state->rbbm_status);
> drm_printf(p, "revision: %d (%d.%d.%d.%d)\n",
> adreno_gpu->info->revn, adreno_gpu->rev.core,
> adreno_gpu->rev.major, adreno_gpu->rev.minor,
> adreno_gpu->rev.patchid);
>
> - for (i = 0; i < gpu->nr_rings; i++) {
> - drm_printf(p, "rb %d: fence: %d/%d\n", i,
> - state->ring[i].fence, state->ring[i].seqno);
> + drm_printf(p, "rbbm-status: 0x%08x\n", state->rbbm_status);
> +
> + drm_puts(p, "ringbuffer:\n");
>
> - drm_printf(p, " rptr: %d\n", state->ring[i].rptr);
> - drm_printf(p, "rb wptr: %d\n", state->ring[i].wptr);
> + for (i = 0; i < gpu->nr_rings; i++) {
> + drm_printf(p, " - id: %d\n", i);
> + drm_printf(p, " last-fence: %d\n", state->ring[i].seqno);
> + drm_printf(p, " retired-fence: %d\n", state->ring[i].fence);
> + drm_printf(p, " rptr: %d\n", state->ring[i].rptr);
> + drm_printf(p, " wptr: %d\n", state->ring[i].wptr);
> }
>
> - drm_printf(p, "IO:region %s 00000000 00020000\n", gpu->name);
> + drm_puts(p, "registers:\n");
> +
> for (i = 0; i < state->nr_registers; i++) {
> - drm_printf(p, "IO:R %08x %08x\n",
> + drm_printf(p, " - { offset: 0x%04x, value: 0x%08x }\n",
> state->registers[i * 2] << 2,
> state->registers[(i * 2) + 1]);
> }
> --
> 2.17.1
>
> _______________________________________________
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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