On 2020-11-29 10:12, Rob Clark wrote:
From: Rob Clark <robdcl...@chromium.org>
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c:227: warning: Function
parameter or member 'ctl' not described in
'mdp5_ctl_set_encoder_state'
drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c:227: warning: Function
parameter or member 'pipeline' not described in
'mdp5_ctl_set_encoder_state'
drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c:227: warning: Function
parameter or member 'enabled' not described in
'mdp5_ctl_set_encoder_state'
drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c:227: warning: Excess
function parameter 'enable' description in
'mdp5_ctl_set_encoder_state'
drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c:529: warning: Function
parameter or member 'ctl' not described in 'mdp5_ctl_commit'
drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c:529: warning: Function
parameter or member 'pipeline' not described in 'mdp5_ctl_commit'
drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c:529: warning: Function
parameter or member 'flush_mask' not described in 'mdp5_ctl_commit'
drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c:529: warning: Function
parameter or member 'start' not described in 'mdp5_ctl_commit'
Cc: Lee Jones <lee.jo...@linaro.org>
Signed-off-by: Rob Clark <robdcl...@chromium.org>
Reviewed-by: Abhinav Kumar <abhin...@codeaurora.org>
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c
b/drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c
index 030279d7b64b..81b0c7cf954e 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c
@@ -216,7 +216,9 @@ static void send_start_signal(struct mdp5_ctl *ctl)
/**
* mdp5_ctl_set_encoder_state() - set the encoder state
*
- * @enable: true, when encoder is ready for data streaming; false,
otherwise.
+ * @ctl: the CTL instance
+ * @pipeline: the encoder's INTF + MIXER configuration
+ * @enabled: true, when encoder is ready for data streaming; false,
otherwise.
*
* Note:
* This encoder state is needed to trigger START signal (data path
kickoff).
@@ -510,6 +512,13 @@ static void fix_for_single_flush(struct mdp5_ctl
*ctl, u32 *flush_mask,
/**
* mdp5_ctl_commit() - Register Flush
*
+ * @ctl: the CTL instance
+ * @pipeline: the encoder's INTF + MIXER configuration
+ * @flush_mask: bitmask of display controller hw blocks to flush
+ * @start: if true, immediately update flush registers and set
START
+ * bit, otherwise accumulate flush_mask bits until we are
+ * ready to START
+ *
* The flush register is used to indicate several registers are all
* programmed, and are safe to update to the back copy of the double
* buffered registers.
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