Hi,
On Wed, May 26, 2021 at 10:08 PM Krishna Manikandan
<mkri...@codeaurora.org> wrote:
>
> Crtc perf update from frame event work can result in
> wrong bandwidth and clock update from dpu if the work
> is scheduled after the swap state has happened.
>
> Avoid such issues by moving perf update to complete
> commit once the frame is accepted by the hardware.
>
> Fixes: a29c8c024165 ("drm/msm/disp/dpu1: fix display underruns during
> modeset")
> Signed-off-by: Krishna Manikandan <mkri...@codeaurora.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
I don't know much about this code or any of the theory behind it, but
I can confirm that this fixes the hang I was seeing with the previous
patch. On sc7180-trogdor-lazor:
Tested-by: Douglas Anderson <diand...@chromium.org>
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