Add some defines required for A702. Can be substituted with a header sync after merging mesa!27665 [1].
[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27665 Signed-off-by: Konrad Dybcio <konrad.dyb...@linaro.org> --- drivers/gpu/drm/msm/adreno/a6xx.xml.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx.xml.h b/drivers/gpu/drm/msm/adreno/a6xx.xml.h index 863b5e3b0e67..1ec4dbc0e746 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx.xml.h +++ b/drivers/gpu/drm/msm/adreno/a6xx.xml.h @@ -1945,6 +1945,24 @@ static inline uint32_t REG_A6XX_RBBM_PERFCTR_RBBM_SEL(uint32_t i0) { return 0x00 #define REG_A6XX_RBBM_CLOCK_HYST_TEX_FCHE 0x00000122 +#define REG_A6XX_RBBM_CLOCK_CNTL_FCHE 0x00000123 + +#define REG_A6XX_RBBM_CLOCK_DELAY_FCHE 0x00000124 + +#define REG_A6XX_RBBM_CLOCK_HYST_FCHE 0x00000125 + +#define REG_A6XX_RBBM_CLOCK_CNTL_MHUB 0x00000126 + +#define REG_A6XX_RBBM_CLOCK_DELAY_MHUB 0x00000127 + +#define REG_A6XX_RBBM_CLOCK_HYST_MHUB 0x00000128 + +#define REG_A6XX_RBBM_CLOCK_DELAY_GLC 0x00000129 + +#define REG_A6XX_RBBM_CLOCK_HYST_GLC 0x0000012a + +#define REG_A6XX_RBBM_CLOCK_CNTL_GLC 0x0000012b + #define REG_A7XX_RBBM_CLOCK_HYST2_VFD 0x0000012f #define REG_A6XX_RBBM_LPAC_GBIF_CLIENT_QOS_CNTL 0x000005ff -- 2.43.2
