On 5/20/2024 5:12 AM, Dmitry Baryshkov wrote:
Command-mode DSI panels need to signal the display controlller when
vsync happens, so that the device can start sending the next frame. Some
devices (Google Pixel 3) use a non-default pin, so additional
configuration is required. Add a way to specify this information in DT
and handle it in the DSI and DPU drivers.
Which pin is the pixel 3 using? Just wanted to know .. is it gpio0 or gpio1?
Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
---
Dmitry Baryshkov (7):
dt-bindings: display/msm/dsi: allow specifying TE source
drm/msm/dpu: convert vsync source defines to the enum
drm/msm/dsi: drop unused GPIOs handling
drm/msm/dpu: pull the is_cmd_mode out of
_dpu_encoder_update_vsync_source()
drm/msm/dpu: rework vsync_source handling
drm/msm/dsi: parse vsync source from device tree
drm/msm/dpu: support setting the TE source
.../bindings/display/msm/dsi-controller-main.yaml | 16 ++++++++
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 11 ++---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 5 +--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 26 ++++++------
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.h | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 44 ++++++++++++++++++++
drivers/gpu/drm/msm/dsi/dsi.h | 1 +
drivers/gpu/drm/msm/dsi/dsi_host.c | 48 +++++-----------------
drivers/gpu/drm/msm/dsi/dsi_manager.c | 5 +++
drivers/gpu/drm/msm/msm_drv.h | 6 +++
12 files changed, 106 insertions(+), 62 deletions(-)
---
base-commit: 75fa778d74b786a1608d55d655d42b480a6fa8bd
change-id: 20240514-dpu-handle-te-signal-82663c0211bd
Best regards,
