On 2/6/2020 11:15 AM, Bill Gaylord wrote:
The real test would be to decompile an ESP32 binary and check what instruction its really using. If its using the instructions from https://0x04.net/~mwk/doc/xtensa.pdf what require the FPU option then it has to actually be using the FPU unless xtensa is not being true full of their core having an FPU.
It was easy to run objdump, here's a sample: // inBuffer[i] = ((float)rxBuffer[i * 8 + 0]) / 32767.0; inBuffer[i] = ((float)rxBuffer[i * 8 + 0]) * (float)(1.0 / 32767.0); 40082ffd: 0019b2 l16ui a11, a9, 0 40083000: 23cb80 sext a12, a11, 15 40083003: ca0c00 float.s f0, a12, 0 40083006: 2a0040 mul.s f0, f0, f4 40083009: 004403 ssi f0, a4, 0 gcc is emitting floating coprocessor instructions, and the ESP32 is executing them in hardware (otherwise this modem wouldn't work). Espressif's FreeRTOS port pins a task to a core when it uses a co-processor (FPU is a co-processor) AND saves the co-processor state on context-switch. Note: there's no FP division in the ESP32, and you'll want to avoid the default promotion of float to double :-) Cheers, Dana K6JQ _______________________________________________ Freetel-codec2 mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/freetel-codec2
