Hello,
I have bissected the code and found the faulty .o. I have attached
assembly output. idt.gcc46.s is the good one. If L4 is linked with
idt.gcc.47.s, it only reboots.
L4 sources are available here : git://github.com/l4ka/pistachio.git
Regards,
JKB
.file "idt.cc"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string
"/home/bertrand/openvms/l4/pistachio/kernel/src/glue/v4-x86/idt.cc"
.align 8
.LC1:
.string "Assertion index < IDT_SIZE failed in file %s, line %d
(fn=%p)\n"
.section .init.system,"ax",@progbits
.align 2
.p2align 4,,15
.globl _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
.type _ZN5idt_t9init_gateEmNS_6type_eEPFvvE, @function
_ZN5idt_t9init_gateEmNS_6type_eEPFvvE:
.LFB96:
.cfi_startproc
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $255, %rsi
movq %rbx, 8(%rsp)
movq %rbp, 16(%rsp)
movq %rcx, %rbx
.cfi_offset 6, -32
.cfi_offset 3, -40
movq %r12, 24(%rsp)
movq %r13, 32(%rsp)
movq %rsi, %r12
.cfi_offset 13, -16
.cfi_offset 12, -24
movq %rdi, %r13
movl %edx, %ebp
ja .L8
.L2:
cmpl $1, %ebp
je .L5
cmpl $2, %ebp
je .L6
testl %ebp, %ebp
.p2align 4,,3
jne .L1
salq $4, %r12
movq %rbx, %rax
addq %r12, %r13
shrq $16, %rax
movw %bx, 0(%r13)
shrq $32, %rbx
movw %ax, 6(%r13)
movl %ebx, 8(%r13)
movw $8, 2(%r13)
movb $-114, 5(%r13)
movl $0, 12(%r13)
movb $0, 4(%r13)
.L1:
movq 8(%rsp), %rbx
movq 16(%rsp), %rbp
movq 24(%rsp), %r12
movq 32(%rsp), %r13
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
.cfi_restore 13
.cfi_restore 12
.cfi_restore 6
.cfi_restore 3
ret
.p2align 4,,7
.p2align 3
.L6:
.cfi_restore_state
salq $4, %r12
movq %rbx, %rax
addq %r12, %r13
shrq $16, %rax
movw %bx, 0(%r13)
shrq $32, %rbx
movw %ax, 6(%r13)
movl %ebx, 8(%r13)
movw $8, 2(%r13)
movb $-113, 5(%r13)
movl $0, 12(%r13)
movb $0, 4(%r13)
jmp .L1
.p2align 4,,7
.p2align 3
.L5:
salq $4, %r12
movq %rbx, %rax
addq %r12, %r13
shrq $16, %rax
movw %bx, 0(%r13)
shrq $32, %rbx
movw %ax, 6(%r13)
movl %ebx, 8(%r13)
movw $8, 2(%r13)
movb $-18, 5(%r13)
movl $0, 12(%r13)
movb $0, 4(%r13)
jmp .L1
.L8:
movq 40(%rsp), %rcx
movl $54, %edx
movq $.LC0, %rsi
movq $.LC1, %rdi
xorl %eax, %eax
call printf
xorl %eax, %eax
#APP
# 54 "/home/bertrand/openvms/l4/pistachio/kernel/src/glue/v4-x86/idt.cc" 1
int $3
jmp 1f
mov $2f, %rax
.section .rodata
2:.ascii "KD# assert"
.byte 0
.previous
1:
# 0 "" 2
#NO_APP
jmp .L2
.cfi_endproc
.LFE96:
.size _ZN5idt_t9init_gateEmNS_6type_eEPFvvE,
.-_ZN5idt_t9init_gateEmNS_6type_eEPFvvE
.text
.align 2
.p2align 4,,15
.globl _ZN5idt_t8add_gateEmNS_6type_eEPFvvE
.type _ZN5idt_t8add_gateEmNS_6type_eEPFvvE, @function
_ZN5idt_t8add_gateEmNS_6type_eEPFvvE:
.LFB97:
.cfi_startproc
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $255, %rsi
movq %rbx, 8(%rsp)
movq %rbp, 16(%rsp)
movq %rcx, %rbx
.cfi_offset 6, -32
.cfi_offset 3, -40
movq %r12, 24(%rsp)
movq %r13, 32(%rsp)
movq %rsi, %r12
.cfi_offset 13, -16
.cfi_offset 12, -24
movq %rdi, %r13
movl %edx, %ebp
ja .L15
.L10:
cmpl $1, %ebp
je .L13
cmpl $2, %ebp
je .L14
testl %ebp, %ebp
.p2align 4,,3
jne .L9
salq $4, %r12
movq %rbx, %rax
addq %r12, %r13
shrq $16, %rax
movw %bx, 0(%r13)
shrq $32, %rbx
movw %ax, 6(%r13)
movl %ebx, 8(%r13)
movw $8, 2(%r13)
movb $-114, 5(%r13)
movl $0, 12(%r13)
movb $0, 4(%r13)
.L9:
movq 8(%rsp), %rbx
movq 16(%rsp), %rbp
movq 24(%rsp), %r12
movq 32(%rsp), %r13
addq $40, %rsp
.cfi_remember_state
.cfi_def_cfa_offset 8
.cfi_restore 13
.cfi_restore 12
.cfi_restore 6
.cfi_restore 3
ret
.p2align 4,,7
.p2align 3
.L14:
.cfi_restore_state
salq $4, %r12
movq %rbx, %rax
addq %r12, %r13
shrq $16, %rax
movw %bx, 0(%r13)
shrq $32, %rbx
movw %ax, 6(%r13)
movl %ebx, 8(%r13)
movw $8, 2(%r13)
movb $-113, 5(%r13)
movl $0, 12(%r13)
movb $0, 4(%r13)
jmp .L9
.p2align 4,,7
.p2align 3
.L13:
salq $4, %r12
movq %rbx, %rax
addq %r12, %r13
shrq $16, %rax
movw %bx, 0(%r13)
shrq $32, %rbx
movw %ax, 6(%r13)
movl %ebx, 8(%r13)
movw $8, 2(%r13)
movb $-18, 5(%r13)
movl $0, 12(%r13)
movb $0, 4(%r13)
jmp .L9
.L15:
movq 40(%rsp), %rcx
movl $72, %edx
movq $.LC0, %rsi
movq $.LC1, %rdi
xorl %eax, %eax
call printf
xorl %eax, %eax
#APP
# 72 "/home/bertrand/openvms/l4/pistachio/kernel/src/glue/v4-x86/idt.cc" 1
int $3
jmp 1f
mov $2f, %rax
.section .rodata
2:.ascii "KD# assert"
.byte 0
.previous
1:
# 0 "" 2
#NO_APP
jmp .L10
.cfi_endproc
.LFE97:
.size _ZN5idt_t8add_gateEmNS_6type_eEPFvvE,
.-_ZN5idt_t8add_gateEmNS_6type_eEPFvvE
.align 2
.p2align 4,,15
.globl _ZN5idt_t8activateEv
.type _ZN5idt_t8activateEv, @function
_ZN5idt_t8activateEv:
.LFB98:
.cfi_startproc
subq $16, %rsp
.cfi_def_cfa_offset 24
movq %rdi, 8(%rsp)
movw $4096, 6(%rsp)
#APP
# 60 "/home/bertrand/openvms/l4/pistachio/kernel/src/arch/x86/segdesc.h" 1
lidt 6(%rsp)
# 0 "" 2
#NO_APP
addq $16, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE98:
.size _ZN5idt_t8activateEv, .-_ZN5idt_t8activateEv
.section .init.cpu,"ax",@progbits
.align 2
.p2align 4,,15
.globl _ZN5idt_tC2Ev
.type _ZN5idt_tC2Ev, @function
_ZN5idt_tC2Ev:
.LFB100:
.cfi_startproc
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
movq %rdi, %r12
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
movl $2043, %ebp
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
xorl %ebx, %ebx
.p2align 4,,7
.p2align 3
.L18:
movq %rbp, %rax
xorl %edx, %edx
movq %rbx, %rsi
salq $8, %rax
movq %r12, %rdi
subq $8, %rbp
orb $-24, %al
movq %rax, exc_catch_all(,%rbx,8)
movslq %ebx, %rax
incq %rbx
leaq exc_catch_all(,%rax,8), %rcx
call _ZN5idt_t8add_gateEmNS_6type_eEPFvvE
cmpq $256, %rbx
jne .L18
movq %r12, %rdi
movq $exc_debug, %rcx
xorl %edx, %edx
movl $1, %esi
call _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
movq %r12, %rdi
movq $exc_nmi, %rcx
xorl %edx, %edx
movl $2, %esi
call _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
movq %r12, %rdi
movq $exc_breakpoint, %rcx
movl $1, %edx
movl $3, %esi
call _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
movq %r12, %rdi
movq $exc_invalid_opcode, %rcx
xorl %edx, %edx
movl $6, %esi
call _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
movq %r12, %rdi
movq $exc_nomath_coproc, %rcx
xorl %edx, %edx
movl $7, %esi
call _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
movq %r12, %rdi
movq $exc_gp, %rcx
xorl %edx, %edx
movl $13, %esi
call _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
popq %rbx
.cfi_def_cfa_offset 24
.cfi_restore 3
popq %rbp
.cfi_def_cfa_offset 16
.cfi_restore 6
movq %r12, %rdi
movq $exc_pagefault, %rcx
xorl %edx, %edx
popq %r12
.cfi_def_cfa_offset 8
.cfi_restore 12
movl $14, %esi
jmp _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
.cfi_endproc
.LFE100:
.size _ZN5idt_tC2Ev, .-_ZN5idt_tC2Ev
.section .text.startup,"ax",@progbits
.p2align 4,,15
.type _GLOBAL__sub_I.55532_idt, @function
_GLOBAL__sub_I.55532_idt:
.LFB103:
.cfi_startproc
movq $idt, %rdi
jmp _ZN5idt_tC1Ev
.cfi_endproc
.LFE103:
.size _GLOBAL__sub_I.55532_idt, .-_GLOBAL__sub_I.55532_idt
.section .ctors.10003,"aw",@progbits
.align 8
.quad _GLOBAL__sub_I.55532_idt
.globl idt
.section .data.x86.idt,"aw",@progbits
.align 32
.type idt, @object
.size idt, 4096
idt:
.zero 4096
.globl _ZN5idt_tC1Ev
.set _ZN5idt_tC1Ev,_ZN5idt_tC2Ev
.ident "GCC: (Debian 4.6.4-2) 4.6.4"
.section .note.GNU-stack,"",@progbits
.file "idt.cc"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string
"/home/bertrand/openvms/l4/pistachio/kernel/src/glue/v4-x86/idt.cc"
.align 8
.LC1:
.string "Assertion index < IDT_SIZE failed in file %s, line %d
(fn=%p)\n"
.section .init.system,"ax",@progbits
.align 2
.p2align 4,,15
.globl _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
.type _ZN5idt_t9init_gateEmNS_6type_eEPFvvE, @function
_ZN5idt_t9init_gateEmNS_6type_eEPFvvE:
.LFB96:
.cfi_startproc
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $255, %rsi
movq %rbx, 8(%rsp)
movq %rbp, 16(%rsp)
.cfi_offset 3, -40
.cfi_offset 6, -32
movq %rcx, %rbx
movq %r12, 24(%rsp)
movq %r13, 32(%rsp)
.cfi_offset 12, -24
.cfi_offset 13, -16
movq %rsi, %r12
movq %rdi, %r13
movl %edx, %ebp
ja .L9
.L2:
cmpl $1, %ebp
je .L5
cmpl $2, %ebp
je .L6
testl %ebp, %ebp
.p2align 4,,3
jne .L1
salq $4, %r12
movq %rbx, %rax
addq %r13, %r12
shrq $16, %rax
movw %bx, (%r12)
shrq $32, %rbx
movw %ax, 6(%r12)
movl %ebx, 8(%r12)
movw $8, 2(%r12)
movb $-114, 5(%r12)
movl $0, 12(%r12)
movb $0, 4(%r12)
.L1:
movq 8(%rsp), %rbx
movq 16(%rsp), %rbp
movq 24(%rsp), %r12
movq 32(%rsp), %r13
addq $40, %rsp
.cfi_remember_state
.cfi_restore 13
.cfi_restore 12
.cfi_restore 6
.cfi_restore 3
.cfi_def_cfa_offset 8
ret
.p2align 4,,7
.p2align 3
.L6:
.cfi_restore_state
salq $4, %r12
movq %rbx, %rax
addq %r13, %r12
shrq $16, %rax
movw %bx, (%r12)
shrq $32, %rbx
movw %ax, 6(%r12)
movl %ebx, 8(%r12)
movw $8, 2(%r12)
movb $-113, 5(%r12)
movl $0, 12(%r12)
movb $0, 4(%r12)
jmp .L1
.p2align 4,,7
.p2align 3
.L5:
salq $4, %r12
movq %rbx, %rax
addq %r13, %r12
shrq $16, %rax
movw %bx, (%r12)
shrq $32, %rbx
movw %ax, 6(%r12)
movl %ebx, 8(%r12)
movw $8, 2(%r12)
movb $-18, 5(%r12)
movl $0, 12(%r12)
movb $0, 4(%r12)
jmp .L1
.L9:
movq 40(%rsp), %rcx
movl $54, %edx
movq $.LC0, %rsi
movq $.LC1, %rdi
xorl %eax, %eax
call printf
xorl %eax, %eax
#APP
# 54 "/home/bertrand/openvms/l4/pistachio/kernel/src/glue/v4-x86/idt.cc" 1
int $3
jmp 1f
mov $2f, %rax
.section .rodata
2:.ascii "KD# assert"
.byte 0
.previous
1:
# 0 "" 2
#NO_APP
jmp .L2
.cfi_endproc
.LFE96:
.size _ZN5idt_t9init_gateEmNS_6type_eEPFvvE,
.-_ZN5idt_t9init_gateEmNS_6type_eEPFvvE
.text
.align 2
.p2align 4,,15
.globl _ZN5idt_t8add_gateEmNS_6type_eEPFvvE
.type _ZN5idt_t8add_gateEmNS_6type_eEPFvvE, @function
_ZN5idt_t8add_gateEmNS_6type_eEPFvvE:
.LFB97:
.cfi_startproc
subq $40, %rsp
.cfi_def_cfa_offset 48
cmpq $255, %rsi
movq %rbx, 8(%rsp)
movq %rbp, 16(%rsp)
.cfi_offset 3, -40
.cfi_offset 6, -32
movq %rcx, %rbx
movq %r12, 24(%rsp)
movq %r13, 32(%rsp)
.cfi_offset 12, -24
.cfi_offset 13, -16
movq %rsi, %r12
movq %rdi, %r13
movl %edx, %ebp
ja .L17
.L11:
cmpl $1, %ebp
je .L14
cmpl $2, %ebp
je .L15
testl %ebp, %ebp
.p2align 4,,3
jne .L10
salq $4, %r12
movq %rbx, %rax
addq %r13, %r12
shrq $16, %rax
movw %bx, (%r12)
shrq $32, %rbx
movw %ax, 6(%r12)
movl %ebx, 8(%r12)
movw $8, 2(%r12)
movb $-114, 5(%r12)
movl $0, 12(%r12)
movb $0, 4(%r12)
.L10:
movq 8(%rsp), %rbx
movq 16(%rsp), %rbp
movq 24(%rsp), %r12
movq 32(%rsp), %r13
addq $40, %rsp
.cfi_remember_state
.cfi_restore 13
.cfi_restore 12
.cfi_restore 6
.cfi_restore 3
.cfi_def_cfa_offset 8
ret
.p2align 4,,7
.p2align 3
.L15:
.cfi_restore_state
salq $4, %r12
movq %rbx, %rax
addq %r13, %r12
shrq $16, %rax
movw %bx, (%r12)
shrq $32, %rbx
movw %ax, 6(%r12)
movl %ebx, 8(%r12)
movw $8, 2(%r12)
movb $-113, 5(%r12)
movl $0, 12(%r12)
movb $0, 4(%r12)
jmp .L10
.p2align 4,,7
.p2align 3
.L14:
salq $4, %r12
movq %rbx, %rax
addq %r13, %r12
shrq $16, %rax
movw %bx, (%r12)
shrq $32, %rbx
movw %ax, 6(%r12)
movl %ebx, 8(%r12)
movw $8, 2(%r12)
movb $-18, 5(%r12)
movl $0, 12(%r12)
movb $0, 4(%r12)
jmp .L10
.L17:
movq 40(%rsp), %rcx
movl $72, %edx
movq $.LC0, %rsi
movq $.LC1, %rdi
xorl %eax, %eax
call printf
xorl %eax, %eax
#APP
# 72 "/home/bertrand/openvms/l4/pistachio/kernel/src/glue/v4-x86/idt.cc" 1
int $3
jmp 1f
mov $2f, %rax
.section .rodata
2:.ascii "KD# assert"
.byte 0
.previous
1:
# 0 "" 2
#NO_APP
jmp .L11
.cfi_endproc
.LFE97:
.size _ZN5idt_t8add_gateEmNS_6type_eEPFvvE,
.-_ZN5idt_t8add_gateEmNS_6type_eEPFvvE
.align 2
.p2align 4,,15
.globl _ZN5idt_t8activateEv
.type _ZN5idt_t8activateEv, @function
_ZN5idt_t8activateEv:
.LFB98:
.cfi_startproc
subq $16, %rsp
.cfi_def_cfa_offset 24
movq %rdi, 8(%rsp)
movw $4096, 6(%rsp)
#APP
# 60 "/home/bertrand/openvms/l4/pistachio/kernel/src/arch/x86/segdesc.h" 1
lidt 6(%rsp)
# 0 "" 2
#NO_APP
addq $16, %rsp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE98:
.size _ZN5idt_t8activateEv, .-_ZN5idt_t8activateEv
.section .init.cpu,"ax",@progbits
.align 2
.p2align 4,,15
.globl _ZN5idt_tC2Ev
.type _ZN5idt_tC2Ev, @function
_ZN5idt_tC2Ev:
.LFB100:
.cfi_startproc
pushq %r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
movq %rdi, %r12
pushq %rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
movl $2043, %ebp
pushq %rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
xorl %ebx, %ebx
.p2align 4,,7
.p2align 3
.L21:
movq %rbp, %rax
xorl %edx, %edx
movq %rbx, %rsi
salq $8, %rax
movq %r12, %rdi
subq $8, %rbp
orb $-24, %al
movq %rax, exc_catch_all(,%rbx,8)
movslq %ebx, %rax
incq %rbx
leaq exc_catch_all(,%rax,8), %rcx
call _ZN5idt_t8add_gateEmNS_6type_eEPFvvE
cmpq $256, %rbx
jne .L21
movq %r12, %rdi
movq $exc_debug, %rcx
xorl %edx, %edx
movl $1, %esi
call _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
movq %r12, %rdi
movq $exc_nmi, %rcx
xorl %edx, %edx
movl $2, %esi
call _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
movq %r12, %rdi
movq $exc_breakpoint, %rcx
movl $1, %edx
movl $3, %esi
call _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
movq %r12, %rdi
movq $exc_invalid_opcode, %rcx
xorl %edx, %edx
movl $6, %esi
call _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
movq %r12, %rdi
movq $exc_nomath_coproc, %rcx
xorl %edx, %edx
movl $7, %esi
call _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
movq %r12, %rdi
movq $exc_gp, %rcx
xorl %edx, %edx
movl $13, %esi
call _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
popq %rbx
.cfi_restore 3
.cfi_def_cfa_offset 24
popq %rbp
.cfi_restore 6
.cfi_def_cfa_offset 16
movq %r12, %rdi
movq $exc_pagefault, %rcx
xorl %edx, %edx
popq %r12
.cfi_restore 12
.cfi_def_cfa_offset 8
movl $14, %esi
jmp _ZN5idt_t9init_gateEmNS_6type_eEPFvvE
.cfi_endproc
.LFE100:
.size _ZN5idt_tC2Ev, .-_ZN5idt_tC2Ev
.globl _ZN5idt_tC1Ev
.set _ZN5idt_tC1Ev,_ZN5idt_tC2Ev
.section .text.startup,"ax",@progbits
.p2align 4,,15
.type _GLOBAL__sub_I.55532_idt, @function
_GLOBAL__sub_I.55532_idt:
.LFB103:
.cfi_startproc
movq $idt, %rdi
jmp _ZN5idt_tC1Ev
.cfi_endproc
.LFE103:
.size _GLOBAL__sub_I.55532_idt, .-_GLOBAL__sub_I.55532_idt
.section .init_array.55532,"aw"
.align 8
.quad _GLOBAL__sub_I.55532_idt
.globl idt
.section .data.x86.idt,"aw",@progbits
.align 32
.type idt, @object
.size idt, 4096
idt:
.zero 4096
.ident "GCC: (Debian 4.7.3-4) 4.7.3"
.section .note.GNU-stack,"",@progbits
/*********************************************************************
*
* Copyright (C) 2002-2004, 2007-2008, 2010, Karlsruhe University
*
* File path: glue/v4-x86/idt.cc
* Description: v4 specific idt implementation
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: idt.cc,v 1.11 2004/05/31 14:15:59 stoess Exp $
*
********************************************************************/
/* trap definition */
#include INC_ARCH(traps.h)
#include INC_ARCH(segdesc.h)
#include INC_GLUE(syscalls.h)
#include INC_GLUE(idt.h)
#include INC_GLUE(traphandler.h)
#include <debug.h>
#include <ctors.h>
/**
* idt: the global IDT (see: IA32 Vol 3)
*/
idt_t idt UNIT("x86.idt") CTORPRIO(CTORPRIO_GLOBAL, 3);
void SECTION(".init.system")
idt_t::init_gate(word_t index, idt_t::type_e type, void (*address)())
{
ASSERT(index < IDT_SIZE);
switch (type)
{
case interrupt:
descriptors[index].set(X86_KCS, address, x86_idtdesc_t::interrupt, 0);
break;
case syscall:
descriptors[index].set(X86_KCS, address, x86_idtdesc_t::interrupt, 3);
break;
case trap:
descriptors[index].set(X86_KCS, address, x86_idtdesc_t::trap, 0);
break;
}
}
void idt_t::add_gate(word_t index, idt_t::type_e type, void (*address)())
{
ASSERT(index < IDT_SIZE);
switch (type)
{
case interrupt:
descriptors[index].set(X86_KCS, address, x86_idtdesc_t::interrupt, 0);
break;
case syscall:
descriptors[index].set(X86_KCS, address, x86_idtdesc_t::interrupt, 3);
break;
case trap:
descriptors[index].set(X86_KCS, address, x86_idtdesc_t::trap, 0);
break;
}
}
/**
* idt_t::activate: activates the previously set up IDT
*/
void idt_t::activate()
{
x86_descreg_t idt((word_t) descriptors, sizeof(descriptors));
idt.setdescreg(x86_descreg_t::idtr);
}
idt_t::idt_t()
{
for (int i=0;i<IDT_SIZE;i++){
/*
* Synthesize call to exc_catch_common
*
* idt
* exc_catch_all[IDT_SIZE]
* exc_catch_common
*
* e8 = Near call with 4 byte offset (5 byte)
*
*/
exc_catch_all[i] = ( (sizeof(exc_catch_all) - i * sizeof(u64_t) - 5) << 8) | 0xe8;
add_gate(i, interrupt, (func_exc) &exc_catch_all[i]);
}
/* setup the exception gates */
#if defined(CONFIG_DEBUG)
init_gate(X86_EXC_DEBUG, interrupt, exc_debug);
init_gate(X86_EXC_NMI, interrupt, exc_nmi);
init_gate(X86_EXC_BREAKPOINT, syscall,exc_breakpoint);
#endif
init_gate(X86_EXC_INVALIDOPCODE, interrupt, exc_invalid_opcode);
init_gate(X86_EXC_NOMATH_COPROC, interrupt, exc_nomath_coproc);
init_gate(X86_EXC_GENERAL_PROTECTION, interrupt, exc_gp);
init_gate(X86_EXC_PAGEFAULT, interrupt, exc_pagefault);
// 15 reserved
#if defined(CONFIG_SUBARCH_X32)
// syscalls
init_gate(0x30, syscall, exc_user_sysipc);
init_gate(0x31, syscall, exc_user_syscall);
#endif
}
/*********************************************************************
*
* Copyright (C) 2002, 2007-2008, 2010, Karlsruhe University
*
* File path: glue/v4-x86/idt.h
* Description:
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $Id: idt.h,v 1.10 2003/09/24 19:04:36 skoglund Exp $
*
********************************************************************/
#ifndef __GLUE_V4_X86__X32__IDT_H__
#define __GLUE_V4_X86__X32__IDT_H__
#include <debug.h>
#include INC_ARCH(segdesc.h)
#include INC_GLUE(config.h)
class idt_t
{
public:
enum type_e
{
interrupt = 0,
syscall = 1,
trap = 2
};
idt_t() SECTION(".init.cpu");
x86_idtdesc_t get_descriptor(word_t index);
void add_gate(word_t index, type_e type, void (*address)());
void activate();
private:
void init_gate(word_t index, type_e type, void (*address)());
x86_idtdesc_t descriptors[IDT_SIZE];
};
INLINE x86_idtdesc_t idt_t::get_descriptor(word_t index)
{
ASSERT(index < IDT_SIZE);
return descriptors[index];
}
extern idt_t idt;
#endif /* !__GLUE_V4_X86__X32__IDT_H__ */
_______________________________________________
FreeVMS mailing list
[email protected]
https://www.systella.fr/cgi-bin/mailman/listinfo/freevms
