Hello Robert,welcome, > We have several generations of hardware simulations, a > prototype compiler, and we will complete our first production C compiler > within the next few months. If people are interested, I'm happy to send out > a more detailed description of our work. It sounds very interesting, please do! > Since our compiler turns an unbounded stream of tiny instructions (the > output of a conventional software compiler) into an unbounded stream of > finite hardware circuits (the output of our compiler), it seems to me > that the opportunities to optimize the code produced by this compiler > are pretty much infinite, so there's a complex problem for you. I > expect I will have questions about some of these optimizations that > folks on this list could shed some light on. > The advantage over a FPGA is that it can reprogram much faster? > For these last seven years my team and I have been working on a > revolutionary new general purpose computer processor architecture that > is hundreds of times faster than today's general purpose computer > architectures. > So there are 128 l6 bit logic units running at 250 Mhz? That sounds like it should be peak about 10 times faster than say a 3.2 Ghz CPU on similar serial operations, or maybe about the same as a Cell running on all SPUs?
Thanks! Marcus ============================================================ FRIAM Applied Complexity Group listserv Meets Fridays 9a-11:30 at cafe at St. John's College lectures, archives, unsubscribe, maps at http://www.friam.org
