--- You wrote:
I've installed CPU Director, and the Sonnet Cache program.  I even  
discover I could use CHUD/Reggie to look at the L3 registers.  Many  
of which are set, but the L3 is not enabled.

- Ron.

--- end of quote ---
Ron,

If you have any expertise in the depths of firmware and X etc, you might take a
look at the CPU Director log.  I'm not at my machine so I can't direct you to it
but it is referred to in CPUD docs.  This log shows what CPUD is looking for and
can't find on our machines.

I've been curious to know what Quicksilver machines do differently during bootup
to make that l3 cache available.  I doubt it is in the sequence you see when
booting with "verbose" enabled.  That's where the CPUD log comes from and that
is set by the operating system, not open firmware.  It must be in the firmware
stuff that comes before.   I've often thought that there's probably a firmware
line or two that would get it going.  I've looked for Quicksilver firmware
scripts but have had no luck.  (You can read the script in the firmware upgrade
for the DA, but there is no such upgrade for Quicksilver.)

On the other hand, CPUD  in os 9 sees the cache.  Sonnet Cache in Panther did
too.  So there should be a way to get it up without modifying the firmware.

Even without the L3 cache, I like the 800 Dual.  

Rich

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