When I compile (avr-gcc -Os -c -mmcu=at90s2313) this:

void SIG_PIN_CHANGE0 (void) __attribute__ ((signal)); void SIG_PIN_CHANGE0 
(void)
{
  (*(volatile unsigned char *)((0x12) + 0x20)) |= 1;
}

I get:
00000000 <SIG_PIN_CHANGE0>:
   0:   1f 92           push    r1
   2:   0f 92           push    r0
   4:   0f b6           in      r0, 0x3f        ; 63
   6:   0f 92           push    r0
   8:   11 24           eor     r1, r1
   a:   90 9a           sbi     0x12, 0 ; 18
   c:   0f 90           pop     r0
   e:   0f be           out     0x3f, r0        ; 63
  10:   0f 90           pop     r0
  12:   1f 90           pop     r1
  14:   18 95           reti


If the optimizer?/backend knows that the 'sbi' instruction does not
 modify r1 or the status register (0x3f) it could generate this instead:
  
sbi 0x12, 0
reti

Comments?

-- 
           Summary: Speeding up small interrupts on avr
           Product: gcc
           Version: 4.1.0
            Status: UNCONFIRMED
          Severity: enhancement
          Priority: P2
         Component: target
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: berndtrog at yahoo dot com
                CC: gcc-bugs at gcc dot gnu dot org
GCC target triplet: avr


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20296

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