------- Comment #4 from wilson at gcc dot gnu dot org 2006-02-08 02:07 ------- The vect-reduc-dot-s16.c testcase fails because two loops were vectorized, and we only expected one to be vectorized.
The problem here is that the loop in foo1 is not supposed to be recognized and vectorized as a dot-product loop. And it isn't, as expected. However, on IA-64, it is recognized and vectorized as a widen-sum loop. This happens because the IA-64 port defines the widen_ssumv4hi3 pattern. The IA-64 port is the only one that defines this pattern, and hence is probably the only port "broken" here. All others will presumably fail to vectorize this loop. So the IA-64 port emits to the -fdump-tree-vect-details file tmp.c:23: note: pattern recognized: prod_14 w+ result_3 tmp.c:23: note: vectorized 1 loops in function. tmp.c:38: note: pattern recognized: DOT_PROD_EXPR < D.2127_14 , D.2125_10 ... tmp.c:38: note: vectorized 1 loops in function. and the testcase fails because we only expected 1 loop to be vectorized. I think the only thing wrong here is that the dg-final tests in the testcase are not precise enough to handle this case. -- wilson at gcc dot gnu dot org changed: What |Removed |Added ---------------------------------------------------------------------------- Status|UNCONFIRMED |NEW Ever Confirmed|0 |1 Last reconfirmed|0000-00-00 00:00:00 |2006-02-08 02:07:47 date| | http://gcc.gnu.org/bugzilla/show_bug.cgi?id=25918