------- Comment #6 from rth at gcc dot gnu dot org 2007-03-20 17:09 ------- Spill slots *are* being aligned, else you'd see SEGV, not incorrect data. Aliasing *is* the problem:
pand (%esi), %xmm0 movl $1, (%ebx) movl $2, 4(%ebx) movl $3, 8(%ebx) movl $4, 12(%ebx) movdqa %xmm0, (%esi) note the pand before the 1,2,3,4 being stored. The problem here is our choice of vector on which to base __m128i. For some reason we chose V2DImode instead of V4SImode. It's probably easiest to fix this by adding the may_alias attribute to all of the user-visible types provided by the Intel API. -- rth at gcc dot gnu dot org changed: What |Removed |Added ---------------------------------------------------------------------------- AssignedTo|unassigned at gcc dot gnu |rth at gcc dot gnu dot org |dot org | Status|UNCONFIRMED |ASSIGNED Ever Confirmed|0 |1 Last reconfirmed|0000-00-00 00:00:00 |2007-03-20 17:09:33 date| | http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31245