------- Comment #2 from ubizjak at gmail dot com 2007-07-11 19:12 -------
This is due to reload. It is trying to solve following pattern
(insn:HI 25 24 28 2 pr32725.c:14 (parallel [
(set (reg:DI 75)
(and:DI (reg:DI 71)
(reg:DI 74)))
(clobber (reg:CC 17 flags))
]) 299 {*anddi_1_rex64} (expr_list:REG_DEAD (reg:DI 74)
(expr_list:REG_UNUSED (reg:CC 17 flags)
(nil))))
to following register constraints:
(define_insn "*adddi_1_rex64"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r")
(plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0,0,r")
(match_operand:DI 2 "x86_64_general_operand" "rme,re,le")))
(clobber (reg:CC FLAGS_REG))]
But it produces following mess:
(insn 95 24 25 2 pr32725.c:14 (set (reg:DI 3 bx [75])
(reg:DI 0 ax [74])) 82 {*movdi_1_rex64} (nil))
(insn:HI 25 95 96 2 pr32725.c:14 (parallel [
(set (reg:DI 3 bx [75])
(and:DI (reg:DI 3 bx [75])
(reg:DI 37 r8 [71])))
(clobber (reg:CC 17 flags))
]) 299 {*anddi_1_rex64} (nil))
(insn 96 25 33 2 pr32725.c:14 (set (reg:DI 0 ax)
(reg:DI 3 bx [75])) 82 {*movdi_1_rex64} (nil))
Ideally, output reg should be matched to dead reg 74 (due to % modifier) and
this would fix the whole sequence.
Perhaps a reload expert will be interested in this PR ;)
--
ubizjak at gmail dot com changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |bonzini at gnu dot org
Status|UNCONFIRMED |NEW
Component|middle-end |rtl-optimization
Ever Confirmed|0 |1
Keywords| |ra
Last reconfirmed|0000-00-00 00:00:00 |2007-07-11 19:12:37
date| |
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32725
