Gcc 4.5.0 revision 148602 generates:
[...@gnu-6 intrin-1]$ cat y.c
#include <x86intrin.h>
unsigned long long
foo1 (int x)
{
return _rdpmc (x);
}
[...@gnu-6 intrin-1]$ /export/build/gnu/gcc-intrin/build-x86_64-linux/gcc/xgcc
-B/export/build/gnu/gcc-intrin/build-x86_64-linux/gcc/ -O2 -S y.c -m32
[...@gnu-6 intrin-1]$ cat y.s
.file "y.c"
.text
.p2align 4,,15
.globl foo1
.type foo1, @function
foo1:
pushl %ebp
movl %esp, %ebp
movl 8(%ebp), %ecx
rdpmc
popl %ebp
ret
.size foo1, .-foo1
when we use ECX during expand. If I let RA to allocate
register with
Index: i386.md
===================================================================
--- i386.md (revision 6164)
+++ i386.md (working copy)
@@ -22681,11 +22681,17 @@
rtx reg = gen_reg_rtx (DImode);
rtx si;
+#if 0
/* Force operand 1 into ECX. */
rtx ecx = gen_rtx_REG (SImode, CX_REG);
emit_insn (gen_rtx_SET (VOIDmode, ecx, operands[1]));
si = gen_rtx_UNSPEC_VOLATILE (DImode, gen_rtvec (1, ecx),
UNSPECV_RDPMC);
+#else
+ rtx op1 = force_reg (SImode, operands[1]);
+ si = gen_rtx_UNSPEC_VOLATILE (DImode, gen_rtvec (1, op1),
+ UNSPECV_RDPMC);
+#endif
if (TARGET_64BIT)
{
I got
---
[...@gnu-6 intrin-1]$ /export/build/gnu/gcc-intrin/build-x86_64-linux/gcc/xgcc
-B/export/build/gnu/gcc-intrin/build-x86_64-linux/gcc/ -O2 -S y.c -m32
[...@gnu-6 intrin-1]$ more y.s
.file "y.c"
.text
.p2align 4,,15
.globl foo1
.type foo1, @function
foo1:
pushl %ebp
movl %esp, %ebp
movl 8(%ebp), %eax <<------ extra insn
movl %eax, %ecx
rdpmc
popl %ebp
ret
.size foo1, .-foo1
---
It seems that RA/reload handle insns with hard register
poorly if we don't assign hard register before hand.
--
Summary: Inefficient code on insn with fixed hard register
Product: gcc
Version: 4.5.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rtl-optimization
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: hjl dot tools at gmail dot com
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40480
