------- Comment #3 from bernds at gcc dot gnu dot org 2010-07-02 16:26 ------- Subject: Bug 42172
Author: bernds Date: Fri Jul 2 16:25:59 2010 New Revision: 161726 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=161726 Log: PR target/42172 * config/arm/arm.c (thumb1_rtx_costs): Improve support for SIGN_EXTEND and ZERO_EXTEND. (arm_rtx_costs_1): Likewise. (arm_size_rtx_costs): Use arm_rtx_costs_1 for these codes. * config/arm/arm.md (is_arch6): New attribute. (zero_extendhisi2, zero_extendqisi2, extendhisi2, extendqisi2): Tighten the code somewhat, avoiding invalid RTL to occur in the expander patterns. (thumb1_zero_extendhisi2): Merge with thumb1_zero_extendhisi2_v6. (thumb1_zero_extendhisi2_v6): Delete. (thumb1_extendhisi2): Merge with thumb1_extendhisi2_v6. (thumb1_extendhisi2_v6): Delete. (thumb1_extendqisi2): Merge with thumb1_extendhisi2_v6. (thumb1_extendqisi2_v6): Delete. (zero_extendhisi2 for register input splitter): New. (zero_extendqisi2 for register input splitter): New. (thumb1_extendhisi2 for register input splitter): New. (extendhisi2 for register input splitter): New. (extendqisi2 for register input splitter): New. (TARGET_THUMB1 extendqisi2 for memory input splitter): New. (arm_zero_extendhisi2): Allow nonimmediate_operand for operand 1, and add support for a register alternative requiring a split. (thumb1_zero_extendqisi2): Likewise. (arm_zero_extendqisi2): Likewise. (arm_extendhisi2): Likewise. (arm_extendqisi2): Likewise. testsuite/ PR target/42172 * gcc.target/arm/pr42172-1.c: New test. Added: trunk/gcc/testsuite/gcc.target/arm/pr42172-1.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/arm/arm.c trunk/gcc/config/arm/arm.md trunk/gcc/testsuite/ChangeLog -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42172
