http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43129
--- Comment #10 from Stephen Clarke <stephen.clarke at st dot com> 2010-10-14 17:01:47 UTC --- OK, I can see that the ARM ARM states for Rm == PC then its unpredictable. But for Rn == PC, I can only see that its unpredictable if W is 1 or P is 0 (I am looking at encoding A1). So I am struggling to understand that: ldr r3, [pc,r3] is unpredictable. Forgive me if I made a mistake, my knowledge of ARM is a little rusty.
