http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51074
Pat Haugen <pthaugen at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |pthaugen at gcc dot gnu.org
--- Comment #6 from Pat Haugen <pthaugen at gcc dot gnu.org> 2011-11-21
23:57:29 UTC ---
cpu2000 benchmark 176.gcc started failing on PPC with this patch (miscompare of
results). Appears to be due to result from VEC_INTERLEAVE_[LOW|HIGH]_EXPR when
folding. Following is simple testcase to demonstrate results.
temp/gcc> cat junk.c
#include <stdio.h>
#define NUM 8
struct hard_reg_n_uses { int regno; int uses; };
struct hard_reg_n_uses hard_reg_n_uses[NUM];
void main() {
int i;
for (i = 0; i < NUM; i++)
{
hard_reg_n_uses[i].uses = 0;
hard_reg_n_uses[i].regno = i;
}
for (i = 0; i < NUM; i++)
printf("i = %d regno = %d\n",i,hard_reg_n_uses[i].regno);
}
When compiled with revisions prior to r181297 with -O3 -mcpu=power7 I get the
following results:
temp/gcc> a.out
i = 0 regno = 0
i = 1 regno = 1
i = 2 regno = 2
i = 3 regno = 3
i = 4 regno = 4
i = 5 regno = 5
i = 6 regno = 6
i = 7 regno = 7
revision 181297 (and later) give:
temp/gcc> a.out
i = 0 regno = 2
i = 1 regno = 3
i = 2 regno = 0
i = 3 regno = 1
i = 4 regno = 6
i = 5 regno = 7
i = 6 regno = 4
i = 7 regno = 5
Comparing the tree dumps of r181296 and r181297, diff comes in at 127t.dom2
dump.
36,38c36,38
< vect_inter_high.15_17 = VEC_INTERLEAVE_HIGH_EXPR <{ 0, 1, 2, 3 }, { 0, 0,
0, 0 }>;
< vect_inter_low.16_37 = VEC_INTERLEAVE_LOW_EXPR <{ 0, 1, 2, 3 }, { 0, 0, 0,
0 }>;
< MEM[(struct hard_reg_n_uses[8] *)&hard_reg_n_uses] = vect_inter_high.15_17;
---
> vect_inter_high.15_17 = { 2, 0, 3, 0 };
> vect_inter_low.16_37 = { 0, 0, 1, 0 };
> MEM[(struct hard_reg_n_uses[8] *)&hard_reg_n_uses] = { 2, 0, 3, 0 };
40c40
< MEM[(struct hard_reg_n_uses[8] *)&hard_reg_n_uses + 16B] =
vect_inter_low.16_37;
---
> MEM[(struct hard_reg_n_uses[8] *)&hard_reg_n_uses + 16B] = { 0, 0, 1, 0 };
47,49c47,49
< vect_inter_high.15_28 = VEC_INTERLEAVE_HIGH_EXPR <{ 4, 5, 6, 7 }, { 0, 0,
0, 0 }>;
< vect_inter_low.16_29 = VEC_INTERLEAVE_LOW_EXPR <{ 4, 5, 6, 7 }, { 0, 0, 0,
0 }>;
< MEM[(struct hard_reg_n_uses[8] *)&hard_reg_n_uses + 32B] =
vect_inter_high.15_28;
---
> vect_inter_high.15_28 = { 6, 0, 7, 0 };
> vect_inter_low.16_29 = { 4, 0, 5, 0 };
> MEM[(struct hard_reg_n_uses[8] *)&hard_reg_n_uses + 32B] = { 6, 0, 7, 0 };
51c51
< MEM[(struct hard_reg_n_uses[8] *)&hard_reg_n_uses + 48B] =
vect_inter_low.16_29;
---
> MEM[(struct hard_reg_n_uses[8] *)&hard_reg_n_uses + 48B] = { 4, 0, 5, 0 };
