http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51447
Andrey Belevantsev <abel at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |abel at gcc dot gnu.org
--- Comment #9 from Andrey Belevantsev <abel at gcc dot gnu.org> 2012-01-20
07:45:57 UTC ---
(In reply to comment #8)
> For ud_dce it's simplest to add/remove fake edges around it. For 4.8 it could
> be worthwhile to try adding fake edges around all RTL passes (at least those
> running in cfglayout mode) and see what breaks...
Do you mean just add/remove fake edges in init/fini_dce? For Jakub's test:
5 NOTE_INSN_BASIC_BLOCK
2 r60:DI=di:DI
REG_DEAD: di:DI
3 r61:DI=r10:DI
REG_DEAD: r10:DI
4 NOTE_INSN_FUNCTION_BEG
7 bx:DI=r60:DI
REG_DEAD: r60:DI
9 r63:DI=L0
10 clobber [scratch]
11 clobber [bp:DI]
12 bp:DI=[r61:DI]
13 clobber [scratch]
14 clobber [sp:DI]
15 sp:DI=[r61:DI+0x8]
REG_DEAD: r61:DI
16 use bp:DI
17 use sp:DI
18 pc=r63:DI
REG_DEAD: r63:DI
REG_NON_LOCAL_GOTO: 0
on top of his patch this results in
starting the processing of deferred insns
ending the processing of deferred insns
df_analyze called
-df_worklist_dataflow_doublequeue:n_basic_blocks 3 n_edges 1 count 3 ( 1)
+df_worklist_dataflow_doublequeue:n_basic_blocks 3 n_edges 2 count 3 ( 1)
+df_worklist_dataflow_doublequeue:n_basic_blocks 3 n_edges 2 count 3 ( 1)
+df_worklist_dataflow_doublequeue:n_basic_blocks 3 n_edges 2 count 3 ( 1)
bar
@@ -45,7 +47,7 @@ Dataflow summary:
;; rd out (21)
0, 1, 2, 4, 5, 6, 8, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23
-( 0 )->[2]->( )
+( 0 )->[2]->( 1 )
;; bb 2 artificial_defs: { }
;; bb 2 artificial_uses: { u0(6){ d7(bb 2 insn 12) }u1(7){ d9(bb 2 insn 15)
}u2(16){ d11(bb 0 insn -1) }u3(20){ d12(bb 0 insn -1) }}
;; lr in 5 [di] 6 [bp] 7 [sp] 16 [argp] 20 [frame] 39 [r10]
@@ -60,8 +62,8 @@ Dataflow summary:
3, 7, 9, 24, 25, 26
;; rd kill (9)
3, 4, 7, 8, 9, 10, 24, 25, 26
-;; lr out 3 [bx] 7 [sp] 16 [argp] 20 [frame]
-;; live out 3 [bx] 7 [sp] 16 [argp] 20 [frame]
+;; lr out 3 [bx] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
+;; live out 3 [bx] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
;; rd out (24)
0, 1, 2, 3, 5, 6, 7, 9, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
24, 25, 26
;; UD chains for artificial uses
@@ -93,7 +95,7 @@ Dataflow summary:
;; reg 20 { d12(bb 0 insn -1) }
;; reg 63 { d26(bb 2 insn 9) }
-( )->[1]->( )
+( 2 )->[1]->( )
;; bb 1 artificial_defs: { }
;; bb 1 artificial_uses: { u17(3){ }u18(6){ }u19(7){ }u20(20){ }}
;; lr in 3 [bx] 6 [bp] 7 [sp] 20 [frame]
so we get only extra bp in live outs of block 2 and still kill insn 7 (which is
the actual problem). Do we need bx to appear in live ins of EXIT (those are
empty with or without the patch)?
