http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53533
Richard Guenther <rguenth at gcc dot gnu.org> changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |stevenb.gcc at gmail dot | |com --- Comment #10 from Richard Guenther <rguenth at gcc dot gnu.org> 2012-06-12 11:57:20 UTC --- Changing the insn_and_split to (define_insn_and_split "*sse2_mulv4si3" [(set (match_operand:V4SI 0 "register_operand") (mult:V4SI (match_operand:V4SI 1 "register_operand") (match_operand:V4SI 2 "nonmemory_vector_operand")))] ... and defining (define_predicate "nonmemory_vector_operand" (ior (match_operand 0 "register_operand") (match_code "const_vector"))) we ICE because when splitting (insn 26 24 27 3 (set (reg:V4SI 82 [ vect_var_.10 ]) (mult:V4SI (reg:V4SI 83 [ MEM[symbol: a, index: ivtmp.20_9, offset: 0B] ]) (const_vector:V4SI [ (const_int 23 [0x17]) (const_int 23 [0x17]) (const_int 23 [0x17]) (const_int 23 [0x17]) ]))) t.c:9 1496 {*sse2_mulv4si3} (expr_list:REG_DEAD (reg:V4SI 83 [ MEM[symbol: a, index: ivtmp.20_9, offset: 0B] ]) (nil))) we don't even try to simplify when emitting the code. But maybe allowing const_vector in (some of) the define_insn_and_split would be the way to go ...