http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55829
--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> 2013-01-08 09:58:05 UTC --- Created attachment 29103 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=29103 gcc48-pr55829.patch Yeah, comparing the vec_dupv2df and *vec_concatv2df patterns shows that for the former we accept for sse3 but not avx x <- 0, x <- x and x <- m, while for the latter only x <- 0, x and x <- m, 1 and not x <- x, 1, when movddup has 2 different register arguments. With this change it doesn't ICE anymore, even when it actually doesn't emit that form of movddup (the vec_concat of 2x (reg:DF 62) pseudo where (reg:DF 62) is assigned r12 (it is used in the following loop which contains calls), it is LRA reloaded into two stores of r12 into mem, once loaded into xmm1 and used from mem, i.e. for whatever reason the x <- 0, m alternative is chosen, but postreload then turns it into movddup with both arguments xmm1 (x <- 0, 0). I think this patch can be useful and does give the RA more freedom, but it is unclear whether it doesn't make some LRA bug latent. Vlad?
