http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58295
Eric Botcazou <ebotcazou at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target| |arm*-*-*
Status|UNCONFIRMED |NEW
Keywords| |missed-optimization
Last reconfirmed| |2013-09-02
CC| |ebotcazou at gcc dot gnu.org
Ever confirmed|0 |1
Summary|The combination pass |[4.8/4.9 regression] Missed
|doesn't eliminate some |zero-extension elimination
|extra zero extensions |in the combiner
Target Milestone|--- |4.8.2
--- Comment #1 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
Confirmed. Seeing that insn 10 is redundant is not immediate but the combiner
was indeed clever enough to do it. The QI subreg is clearly problematic for
the ARM here (and probably most RISC architectures).
