http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59952
Bug ID: 59952
Summary: -march=core-avx2 should not enable RTM
Product: gcc
Version: 4.8.2
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: thiago at kde dot org
The option -march=core-avx2 to gcc is documented to enable:
Intel Core CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2,
SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AES, PCLMUL,
FSGSBASE, RDRND, FMA, BMI, BMI2 and F16C instruction set
support.
However, it is enabling RTM (Restricted Transactional Memory) too:
$ ~/gcc4.9/bin/g++-4.9 -march=core-avx2 -dM -E -xc /dev/null | grep RTM
#define __RTM__ 1
$ ~/gcc4.9/bin/g++-4.9 --version
g++-4.9 (GCC) 4.9.0 20140125 (experimental)
Only certain Haswell processors have TSX in either form in the CPU. The mobile
parts don't:
$ sed -n '/name/p;/flags/p;/^$/q' /proc/cpuinfo
model name : Intel(R) Core(TM) i7-4500U CPU @ 1.80GHz
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb
rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology
nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2
ssse3 fma cx16 xtpr pdcm pcid sse4_1 sse4_2 movbe popcnt tsc_deadline_timer aes
xsave avx f16c rdrand lahf_lm abm ida arat epb xsaveopt pln pts dtherm
tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 avx2 smep bmi2
erms invpcid
According to the source code, HLE is enabled too when it shouldn't:
#define PTA_HASWELL \
(PTA_IVYBRIDGE | PTA_AVX2 | PTA_BMI | PTA_BMI2 | PTA_LZCNT \
| PTA_FMA | PTA_MOVBE | PTA_RTM | PTA_HLE)
